臺灣博碩士論文加值系統

由於半導體的製造技術日益先進，封裝(package)技術及接線(
interconnection)分析已成為電子系統工作速度的瓶頸，多晶片模組藉由
將多個晶片置於同一封裝內，以及提供更多的信號線繞線層來提升封裝密
度，並降低信號傳輸延遲(propagation delay)及功率消耗(power
consumption)，有效改善電子系統的效能。但另一方面由於封裝接線密度
提高，在多晶片模組的實際設計上，必須更仔細地考量電氣特性以確保多
晶片模組的效能。 在本論本中，我們針對多晶片模組布局，發展了一套
圖形使用者介面的布局編輯器，以及改善電磁干擾(electromagnetic
interference)的自動繞線器。布局編輯器提供使用者對多晶片模組布局
直接編輯修改及手動繞線的功能。自動繞線器則包含了等延遲線(equal
delay line)和接地屏蔽線(shielding wire)的考量以降低多晶片模組的
電磁干擾。

In recent years, interconnection analysis and packaging
technology have become the bottleneck to take full advantage of
the advances in semiconductor fabrication technology. The Multi-
Chip Module (MCM ) technology has been introduced to improve
system performance. However, MCM technology also introduces
additional design constraints in terms of electrical and thermal
characteristics which must be considered during physical design.
In this thesis, we implement a graphical interactive MCM layout
editor based on Microsoft Foundation Class (MFC), which provides
interactive editing functions for MCM layout design. A general
area auto-router with Electromagnetic Interference (EMI)
improvement, and equal delay line as well as shielding wire
considerations for MCM design is also included.