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研究生:李克駿
研究生(外文):Lee, Ko-Chun
論文名稱:穿隧式場效電晶體與鰭式場效電晶體的隨機變異特性 於類比特性指標之比較及探討
論文名稱(外文):Investigation and Comparison of Important Analog Figures of Merit for Tunnel FET and FinFET Considering Random Variations
指導教授:蘇彬
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電子工程學系 電子研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2013
畢業學年度:102
語文別:英文
論文頁數:71
中文關鍵詞:穿隧式場效電晶體鰭式場效電晶體隨機變異特性類比特性指標功函數變異線邊緣粗糙程度
外文關鍵詞:Tunnel FETFinFETRandom VariationsAnalog Figures of Meritwork function variationline edge roughness
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這篇論文藉由TCAD模擬研究和比較了功函數變異及線邊緣粗糙程度對於穿隧式場效電晶體與鰭式場效電晶體的類比特性指標影響。我們的究指出類比特性指標會隨著不同的變異來源有著不同的比較結果在相同的元件尺寸及關閉電流基準下。考慮功函數變異時穿隧式場效電晶體有著較小變異特性對於轉導電流比、輸出阻抗及本質增益,然而截止頻率的比較結果會依汲極偏壓而改變。考慮線邊緣粗糙程度時兩者有相當的轉導電流比、輸出阻抗及本質增益變異性,然而穿隧式場效電晶體以轉導和截止頻率來看是變異性是較差的。
This thesis investigates and compares the impacts of metal-gate work function variation (WFV) and fin line edge roughness (fin LER) on the important analog FOMs (figures of merit) for TFET and FinFET devices using atomistic TCAD simulations. Our study indicates that under similar devices structure and comparable IOFF, the variability comparison between TFET and FinFET may yield different results depending on the dominant variation source for a given analog FOM. Under WFV, TFET exhibits better immunity to WFV than FinFET regarding gm/ID, Rout and intrinsic gain. For fT, however, the comparison result depends on drain bias. Under fin LER, TFET exhibits comparable immunity with FinFET in terms of gm/ID, Rout and intrinsic gain. However, TFET shows worse gm and fT immunity to fin LER than FinFET.
Abstract (Chinese) I
Abstract (English) II
Acknowledgment III
Contents IV
Table Captions V
Figure Captions VI

Chapter 1 Introduction 1
Chapter 2 A Comparative Study of Analog FOMs for TFET and FinFET 4
2.1 Introduction 4
2.2 Simulation Methodologies 5
2.3 DC Metrics 6
2.4 Capacitance and Cutoff Frequency 9
2.5 Summary 10
Chapter 3 Comparison of Analog FOMs for TFET and FinFET Considering Work Function Variation 23
3.1 Introduction 23
3.2 Simulation Methodologies 24
3.3 DC Metrics 25
The gm/ID in subthreshold region 27
3.4 Cutoff Frequency and Capacitance 27
3.5 Summary 30
Chapter 4 Comparison of Analog FOMs for TFET and FinFET Considering Fin Line-Edge-Roughness 48
4.1 Introduction 48
4.2 Simulation Methodologies 49
4.3 DC Metrics 49
4.4 Cutoff Frequency and Capacitance 51
4.5 Summary 53
Chapter 5 Conclusion 67

References 69

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