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研究生:廖耕瑩
研究生(外文):Geng-Ying Liau
論文名稱:銻化銦鎵/銻化鋁 高電洞遷移率異質接面場效電晶體之發展
論文名稱(外文):Development of InGaSb/AlSb High Hole Mobility HFET
指導教授:林恒光
指導教授(外文):Heng-Kuang Lin
學位類別:碩士
校院名稱:國立中央大學
系所名稱:電機工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2010
畢業學年度:98
語文別:中文
論文頁數:172
中文關鍵詞:T型閘極電子束銻化鋁異質接面場效電晶體電洞遷移率銻化鎵銻化銦鎵
外文關鍵詞:e-beamT-gateantimonidehall mobilityHFETInGaSbGaSbAlSb
相關次數:
  • 被引用被引用:2
  • 點閱點閱:250
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  • 收藏至我的研究室書目清單書目收藏:0
銻化物系列已逐漸被評估為具有高潛力的材料應用於數位電路功能,其中銻化銦鎵合金系統擁有所有三五族化合物半導體塊材中最高的電洞遷移率,而為了實現互補式電路的需求,低功率損耗跟高電洞遷移率的傳輸特性是必須的。基於上述前提下,第一型態能帶結構的銻化銦鎵/銻化鋁異質接面場效電晶體則成為了最佳的候選者,除具有足夠的價帶位障使電洞載子有效地被侷限,更可藉由應力產生能帶分裂來降低能帶間載子的散射,並降低電洞有效質量,進一步提升電洞遷移率。
我們首先對磊晶材料進行物性分析,包含有霍爾量測、表面粗糙度、以及應力對能帶結構之變化,再來是針對元件部分進行電性上的分析,共分為三大部分,第一部份為研究不同蕭特基閘極元件特性,分析傳統鈦閘極與高滲透性的鉑閘極對元件的參數影響;第二部份為鈍化元件的發展,為了使元件暴露於大氣環境下能夠長時間保存,我們提出兩種元件鈍化的製作方式,分別為閘極後鈍化與元件製作前鈍化製程;第三部份為開發次微米T型閘極元件,在閘極長度為0.25μm,源極與汲極間距2μm的元件上汲極飽和電流於汲極偏壓為-3.0V時得到67mA/mm,峯值轉導58mS/mm,高頻增益部分fT、fMAX分別為6.15GHz與17.1GHz,電流增益截止頻率與閘極長度乘積達1.54GHz-μm。
Sb-based materials are considered to be high potential for high-speed logic and digital electronics due to their highest electron and hole mobilities among all III-V compounds. Added by their low-power consumption, complementary circuit devices can thus be realized using the amterials system. Type-I band- aligned InGaSb/AlSb two-dimensional hole gases are an excellent candidate for developing heterojunction field-effect transistors considering good hole confinement and compressive stress status, which make feasible further enhancement of hole transport properties in the quantum well.
We analyze epitaxial materials using Hall mea surements, AFM, and PL to characterize transport properties, surface roughness, and band structure. The optimized epitaxyies are fabricated into devices and characterized electrically. Three parts are studied: the first one is the effect of different Schottky gate metals and thermal stability on device performance; the second one is the impact of different passivation approaches, which primarily include the passivation after Schottky gates and the passivation before ohmic contacts, on the device parameters; and the third one is the development of submicron T-gate devices using e-beam writing lithography. In a device with 0.25μm gate length and 2μm source-to-drain spacing, dc performance of IDSS=67mA/mm and gm,peak= 58mS/mm and rf performance of fT=6.15GHz and an fMAX=17.1GHz at a drain voltage of -3.0V are successfully demonstrated. An fT×LG product is as high as 1.54GHz-?m.
目錄
摘要 I
Abstract V
誌謝.………………………………………………………………………………………...VI
目錄 VII
圖目錄 X
表目錄 XVII
第一章 導論 1
1-1研究動機 1
1-2電洞通道異質接面場效電晶體之發展現況 4
1-3論文架構 12
第二章 磊晶與材料物性分析 13
2-1前言 13
2-2電洞通道之HFET磊晶材料與結構 13
2-3應力對能帶結構的影響 26
2-3-1理論計算 26
2-3-2光激發螢光光譜實驗 35
2-4結論…………………………………………………………………………..........35
第三章製程發展與元件製作 40
3-1前言 40
3-2元件製作流程 40
3-2-1歐姆接觸製作 44
3-2-2蕭特基接觸製作 47
3-2-3 InGaSb/AlSb HFETs鈍化製程的發展 53
3-3 結論 55
第四章 P型通道銻化銦鎵/銻化鋁HFET之元件特性 56
4-1前言 56
4-2 P型通道元件 56
4-2-1 P型通道InxGa1-xSb/AlSb HFET元件 56
4-2-2 In0.44Ga0.56Sb/AlSb HFET元件特性 62
4-2-3鉑閘極In0.44Ga0.56Sb/AlSb HFET元件特性 67
4-3鈍化元件發展 76
4-3-1閘極後鈍化之元件特性 77
4-3-2製程前鈍化之元件特性 89
4-4次微米元件特性 100
4-5結論 107
第五章 元件討論與比較 108
5-1前言 108
5-2不同蕭特基閘極金屬對元件性能的影響 108
5-3鈍化製程對元件性能之影響 116
5-3-1閘極後鈍化之元件特性討論 116
5-3-2製程前鈍化之元件特性討論 122
5-4次微米元件之討論 127
5-5結論 133
第六章 結論與未來發展 134
參考文獻 137
附錄1不同蕭特基閘極元件製作流程 139
附錄2閘極後鈍化元件製作流程 144
附錄3製程前鈍化元件製作流程 149
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