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研究生:江佳洛
研究生(外文):Chiang-Chia Lo
論文名稱:半導體可靠度動態隨機存取記憶體產品早期故障率實驗及故障分析
論文名稱(外文):ELFR Experiment Test Verifying Anomaly of Nano-DRAM Product in W-Plug Process
指導教授:王木俊王木俊引用關係
指導教授(外文):Mu-Chun Wang
學位類別:碩士
校院名稱:明新科技大學
系所名稱:電子工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2011
畢業學年度:99
語文別:中文
論文頁數:70
中文關鍵詞:半導體晶圓測試早期故障實驗可靠性故障分析
外文關鍵詞:Semiconductorwafer testELFRreliabilityfailure analysis
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在現代的生活中,IC產品幾乎與我們形影不離,不管是電視,行動電話,電腦或是汽車產品,都廣泛應用著IC,也由於積體電路的不斷進步,使得人們對IC產品品質的需要不斷的提高,而可靠性實驗又可稱為產品品質中的核心實驗,也由於人們對品質的不斷提高,導致可靠性實驗的規範也越來越嚴格。
  在一顆IC產品的發展是從設計,製程,晶圓測試,封裝工程到最後測試等流程,直到量產,都必須依據目前產業界所採用的流程與規範,然而,可靠性實驗是一項非常繁雜的認證實驗,可靠性實驗牽扯到IC產品是否能夠達到業界規定之使用壽命,由於一般業界規定IC產品正常操作時間為10年,但執行起來往往非常曠日廢時,所以必須應用電性及溫度加速,來達到我們所模擬的壽命實驗,進而縮短我們實驗時間,並得到實驗結果。
  在這個研究中,我們主要觀察在110nm製程中的產品的壽命實驗,在實驗中的產品經過ELFR (Early Life Failure Rate)早期故障實驗後並進行驗證,在整個實驗的架構中,我們主要可分為二個部份,第一個部份為在證實早期故障率實驗,能夠有效的篩選出產品在經過初期崩應後還不能完全使其在製程中將帶有缺陷的產品曝露出來,第二部份為利用電性及物性分析技術,針對故障位置進行分析及判定,並確認晶圓製程中的問題,提供晶圓廠改善建議,本研究不僅能夠證實ELFR (Early Life Failure Rate)早期故障實驗的確能夠有效的篩選模式,並能更進一步提高產品品質,以滿足客戶的需求。

IC products are omnipresent in modern life. Because the integrated circuit is progressing constantly and makes life more convenient. Therefore, the quality of integrated circuit plays an important role in all electronic products.
There are certain manufacture procedures as the norm now for the quality procedure regulations with regard to developing, design, manufacturing processes, WAT (Wafer Acceptance Test), and analysis of packaging until mass production. However, the reliability authentication is a complicated procedure, and the reliability experiment involves the life time of products whether it reaches the industry standard or not. It needs time to execute. Because the general industry stipulates that life time of IC is 10 years under normal running. In order to accelerate simulation of the reliability result of wafer experiment, we shorten the test time through the experiments of high temperature and high voltage.
This research is probe into the life time of 110nm semiconductor product. It can be divided into two parts in the whole experiment structure. In the first part, we have used ELFR (Early Life Failure Rate) to prove how can select the relevant failure products effectively. In the second part, utilizing analysis failure technology of electricity, property and chemistry to judge the failure location can infer that the issue of process of manufacturing wafer. This research is able to help remove defective components, provide the high-quality products to customers, and reduce the risk that generates defective products, and improves the technology of manufacturing wafer for enhancing the yield rate of manufacturing process.

摘要 i
Abstract ii
誌謝 iii
目錄 iv
表目錄 v
圖目錄 vi
第一章 緒論 1
1.1簡介 1
1.2研究動機與目的 2
第二章 可靠度概念 3
2.1基本可靠度觀念 3
2.2產品可用壽命 4
2.2.1 早夭期 5
2.2.2 使用期 5
2.2.3 老化期 5
2.3 取樣表 6
2.3.1 LTPD 6
2.3.2 AOQL 7
2.4可靠度認證過程之流程圖 9
2.5產品可靠度驗證流程圖 11
2.6記憶體產品簡介 13
2.6.1記憶體產品各腳位定義 14
2.6.2記憶體陣列 17
2.6.3記憶體定址 17
2.6.4記憶體控制模式設定 19
第三章 可靠度實驗項目及實驗目的 20
3.1 壽命可靠度實驗目的 20
3.1.1 IM 早夭實驗 20
3.1.2 ELFR 早期故障率實驗 20
3.1.3 HTOL 高溫壽命實驗 21
3.1.4 LTOL 低溫壽命實驗 22
3.1.5 HTSL 高溫儲存實驗 22
3.1.6 Burn in 崩應預燒系統 23
3.1.7 Final Test 最終測試驗證系統 25
3.2 可靠度測試的認可標準 26
3.3 可靠度的測試設備 27
第四章 半導體產品故障分析方式及流程 30
4.1 半導體產品分析目的 30
4.2 半導體產品故障分析儀器及設備 31
第五章 實驗結果與討論 38
5.1 問題敘述 38
5.2 電性分析 39
5.3 物性分析 44
5.4 成分分析 50
5.5分析結果與改進 64
第六章 結論 65
參考文獻 66

參考文獻

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