臺灣博碩士論文加值系統

隨著通訊技術的進步，提供高速傳輸服務之無線通訊系統成為重要研究之一。在這篇論文中，首先在MATLAB的環境下模擬基頻傳送端之功能驗證，傳送端之各方塊均符合standard之規範。
有限脈衝響應(FIR)濾波器常被應用在信號處理及頻譜分析上。所以數位濾波器扮演著重要的角色。本論文中，我們實作應用於無線區域網路中IEEE 802.11a符合Nyquist條件的上升餘弦濾波器。這個濾波器是一個典型依係數塑型的有限脈衝響應濾波器。我們基於系統操作在20MHz之下比較了幾個不同的架構，如直接式、摺疊式(對稱式)、CSD。使用ASIC的設計流程來模擬及驗證，在UMC0.18μm技術下，工作電壓為1.8V，其硬體結果顯示本設計能符合IEEE 802.11a 的標準。

The development of wireless communication systems for high data-rate transmission has become one of important researches. In this thesis, design of the baseband transmitter is simulated and verified in MATLAB environment. The result shows that functional blocks of the transmitter can meet the standard specifications.
FIR filters are often used in signal processing and spectral analysis. The digital FIR filter plays an important role. In the thesis, a Nyquist digital filter, i.e., a raised cosine filter, for IEEE 802.11a of WLAN BBP will be implemented. The shaping filter is a typical FIR Filter whose passband shape is set by the tap coefficients. Based on 20MHz system operation, the FIR filters are compared with different architectures, such as direct form, folded direct form(symmetric), and Canonical Signed Digit. We use ASIC design flow to do hardware simulation and verification. The filters are implemented by using UMC0.18μm CMOS technology and the supply voltage is 1.8V. The results show that the implemented raised cosine filter can meet IEEE 802.11a standard.

Chapter 1 Introduction
1.1 Motivation
1.2 OFDM Technology
1.2.1 Guard interval and Cyclic Prefix
1.2.2 OFDM Advantage and Drawback
1.3 Organization of the Thesis
Chapter 2 Overview of IEEE 802.11a Wireless LAN
2.1 Background Information
2.2 The Format of the Transmitter Packet
2.3 Timing Related Parameters
2.4 Function Descriptions of Transmitter
2.4.1 Scrambling
2.4.2 Convolutional Coding
2.4.3 Interleaving
2.4.4 Modulation Mapping
2.4.5 Pilot Subcarriers and IFFT
2.4.6 Windowing and Transmitter Spectrum Mask
2.5 SUMARY
Chapter 3 Digital Shaping Filter
3.1 Introduction
3.1.1 Types of Digital Filter
3.1.2 Digital Filter Design
3.2 Pulse Shaping
3.2.1 The rectangular pulse
3.2.2 Raised Cosine Filters
3.2.3 Square-Root Raised Cosine Filters
3.3 FIR Filter Structures
3.3.1 Direct Form
3.3.2 Transpose-Direct Form
3.3.3 Folded Direct Form (FDF) Structure
3.4 Canonical Signed Digit (CSD)
Chapter 4 Simulation and Filter Implementation
4.1 Software Simulation
4.1.1 Signal Field Bit Assign
4.1.2 Generating the DATA bits
4.2 Digital IC Design Flow
4.3 FIR Shaping Filter
4.4 FIR Filter Hardware Implementation
4.4.1 Direct Form
4.4.2 Direct Form Used Partial Sum Multiplier
4.4.3 Folded direct form (FDF)
4.4.4 CSD
Chapter 5 Conclusion
Reference

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