臺灣博碩士論文加值系統

本文提出兩個基於外部資訊解碼演算法，分別應用在一般區塊渦輪碼解碼與區塊渦輪碼混合式解碼上。由於一般區塊渦輪碼解碼，代數解碼器使用次數的多寡，是解碼複雜度高低的關鍵，如何減少使用次數對於系統複雜度的影響，又不損失性能，是區塊渦輪碼的研究重點。
在每次的疊代解碼過程當中，此演算法藉由比較第m次與第m-1次的外部資訊，進而決定何時進入硬式輸入硬式輸出解碼模式。此概念可以類推至傳統的區塊渦輪解碼。在做每次序列解碼時，當外部資訊量可信賴度較低時，使用軟式解碼器，而在可信賴度較高的情況，使用硬式解碼器，以減少代數解碼的運算量。

This thesis proposes extrinsic-information-based decoding algorithms for original block turbo codes (BTCs) and hybrid block turbo codes. Since the number of algebraic decodings dominates the complexity of BTC decoding, it is important for BTC research to reduce the number of algebraic decodings without noticeable loss of bit-error rate performance.
In each iterative decoding process, the algorithm compares the extrinsic information of the mth iteration and the (m-1)th iteration to determine when the HIHO decoding starts. Additionally, in BTC decoding, the decoder can use the other proposed algorithm to determine the rows/columns that are decoded using HIHO decoding to achieve the reduction of the number of algebraic decodings.

指導教授同意書
口試委員會審定書
長庚大學博碩士著作授權書………………………………………… - iii -
誌謝…………………………………………………………………… - iv -
中文摘要…………………………………………………………………- v -
Abstract………………………………………………………………- vi -
第一章 序論 - 1 -
1-1研究背景 - 1 -
1-2研究目的 - 2 -
1-3論文架構 - 3 -
第二章 乘積碼與區塊渦輪碼 - 4 -
2-1乘積碼 - 4 -
2-1-1乘積碼編碼 - 4 -
2-1-2乘積碼解碼 - 5 -
2-2硬式與軟式解碼 - 7 -
2-2-1最大概似度法則與可靠度 - 8 -
2-2-2硬式解碼 - 10 -
2-2-3軟式解碼 - 10 -
2-2-4 Chase-II 解碼演算法 - 12 -
2-3 區塊渦輪碼 - 14 -
2-3-1軟式判斷與輸出 - 15 -
2-3-2疊代解碼 - 18 -
2-3-3性能模擬 - 19 -
2-4區塊渦輪碼混合式解碼 - 21 -
2-4-1解碼器架構 - 21 -
2-4-2複雜度分析 - 22 -
2-4-3區塊渦輪碼混合式解碼之性能 - 23 -
第三章 新式區塊渦輪碼混合式解碼器―解碼器I - 25 -
3-1外部資訊比對 - 26 -
3-2系統架構與外部資訊比對機制 - 27 -
3-3性能模擬與討論 - 30 -
第四章 新式區塊渦輪碼混合式解碼器―解碼器II - 38 -
4-1系統架構 - 38 -
4-2模擬與討論 - 42 -
4-2-1性能模擬 - 42 -
4-2-1討論與複雜度分析 - 44 -
第五章 結論與展望 - 50 -
參考文獻 - 51 -

圖表目錄
圖2-1 區塊渦輪碼系統圖………………………………………………4
圖2-2 乘積碼編碼架構圖…………………………………………………5
圖2-3 (23,12)格雷碼，硬式解碼與軟式解碼之位元錯誤率模擬圖.11
圖2-4 Chase-II 解碼流程圖…………………………………………13
圖2-5 (23,12)格雷碼，以Chase-II演算法解碼模擬圖……………14
圖2-6區塊渦輪碼區塊圖………………………………………………19
圖2-7 BCH(64,57)X(64,57)區塊渦輪碼位元錯誤率模擬圖…………20
圖2-8 BCH(64,51)X(64,51)區塊渦輪碼位元錯誤率模擬圖…………20
圖2-9區塊渦輪碼混合式解碼區塊圖………………………………22
圖2-10 BCH(64,51)X(64,51)區塊渦輪碼混合式解碼模擬圖………24
圖3-1新式區塊渦輪碼混合式解碼器―解碼器I系統區塊圖…………30
圖3-2 BCH(64,51)X(64,51)，新式區塊渦輪碼混合式解碼器―解碼器I位元錯誤率模擬圖………………………………………………………………31
圖3-3 BCH(64,57)X(64,57)，新式區塊渦輪碼混合式解碼器―解碼器I位元錯誤率模擬圖.………………………………………………………31
圖4-1 外部資訊比對機制序列解碼器選擇流程圖………………………41
圖4-2 BCH(64,51)X(64,51)，新式區塊渦輪碼混合式解碼器―解碼器II位元錯誤率模圖…………………………………………………………43
圖4-3 BCH(64,57)X(64,57)，新式區塊渦輪碼混合式解碼器―解碼器II位元錯誤率模圖………..…………………………………………….44
圖4-4 BCH(64,51)×(64,51)在各dB下，HISO解碼器各疊代使用比……45
圖4-5 BCH(64,57)×(64,57)，在各dB下，HISO解碼器的使用比例圖……47
圖4-6 BCH(64,57)×(64,57)與BCH(64,51)×(64,51)，在各dB下，代數解碼器的使用比例圖………………………………………………………48
表3-1 BCH(64,51)X(64,51)在不同Eb/No之平均SISO疊代解碼器停止疊代次數表…………………………………………………………………32
表3-2 BCH(64,57)X(64,57) 在不同Eb/No之平均SISO疊代解碼器停止疊代次數表………………………………………………………………34
表3-3 BCH(64,51)X(64,51)在2.75dB下，各種解碼方法：代數解碼器、位元錯誤率與疊代停止比對表…………………………………………………35
表3-4 BCH(64,51)X(64,51)在2.75dB下，各種門檻值設定的位元錯誤率與SISO疊代次數比對表……………………………………………36
表4-1 BCH(64,51)×(64,51)與BCH(64,57)×(64,57)，在不同Eb/No之R_HD 關係表…………………………………………………………………46

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