臺灣博碩士論文加值系統

本論文的重點是以矽化鍺改變P-channel SONOS的材料與結構，以提升P-channel SONOS的工作效能。在以矽化鍺為通道的部份，主要是將發表於P型浮動閘極快閃記憶體的研究應用於P-channel SONOS，觀察P-channel SONOS在以矽化鍺為表面通道時，調變鍺的含量，其寫入速度與純矽基底的P-channel SONOS之間的差異。另外，由於二氧化矽與矽化鍺之間介面特性不佳，因此引入單晶矽層(Si-cap)改善其介面特性，我們亦觀察引入單晶矽層後P-channel SONOS的工作效能。
除了使用矽化鍺通道來改善寫入速度之外，亦提出矽化鍺汲極的構想應用於P-channel SONOS。我們提出矽化鍺汲極擴充P-channel SONOS以更簡單的製程方式來改善寫入速度，亦提出不同結構的掩埋通道，包括H型及U型，H型掩埋通道乃是期望其能夠改善讀取效能，提升讀取電流以達到省電的效能，而U型掩埋通道除了擁有H型掩埋通道優點之外，其在製程的方式則較為簡單。
最後，我們亦對P-channel SONOS捕捉層內的電子分佈情形，以不同的偏壓條件以及不同的元件尺寸作探討。提出汲極偏壓較大的反向局部化(Reverse Localization)寫入方式，用以加大雙位元操作時所需的臨界電壓窗口，使其執行雙位元操作的效果更佳。

第一章 序論
1.1 前言………………………………………………………………1
1.2 快閃記憶體面臨問題……………………………………………2
1.3 SONOS快閃記憶體的優點及面臨的問題…………………………3
1.4 文獻回顧…………………………………………………………5
1.4.1 雙位元快閃記憶體(2-Bit)……………………………………5
1.4.2 P通道SONOS快閃記憶體………………………………………6
1.4.3 矽化鍺通道快閃記憶體………………………………………7
1.4.4 矽化鍺源/汲極異質介面電晶體……………………………8
1.5 論文架構…………………………………………………………9
第二章 SONOS基礎理論與基本模擬介紹
2.1 SONOS快閃記憶體元件操作原理………………………………21
2.1.1通道熱電子注入寫入…………………………………………21
2.1.2 FN穿隧寫入……………………………………………………22
2.1.3 FN穿隧抹除……………………………………………………23
2.1.4 帶對帶穿隧引發熱載子寫入(BBHE ) ………………………23
2.2 SONOS快閃記憶體元件特性……………………………………24
2.2.1 耐力……………………………………………………………24
2.2.2 干擾……………………………………………………………26
2.2.3 電荷保持………………………………………………………27
2.3 模擬軟體介紹……………………………………………………28
2.4 P-channel SONOS之基本模擬…………………………………30
2.4.1模擬元件參數及物理模型……………………………………30
2.4.2 P-channel SONOS模擬結果……………………………………31
第三章 矽化鍺通道應用於P-channel SONOS
3.1矽化鍺合金表面通道之應用………………………………………44
3.1.1 BBHE寫入………………………………………………………45
3.1.2 抹除現象………………………………………………………46
3.1.3 干擾……………………………………………………………47
3.2 不同單晶矽層(Si-cap)厚度之應用……………………………48
3.2.1 BBHE寫入………………………………………………………49
3.2.2 抹除現象………………………………………………………50
3.2.3 干擾……………………………………………………………50
3.3 矽化鍺通道之厚度與位置探討…………………………………51
3.3.1矽化鍺表面通道厚度之探討……………………………………52
3.3.2矽化鍺掩埋通道位置之探討……………………………………53
3.4 結論………………………………………………………………55
第四章 矽化鍺汲極應用於P-channel SONOS
4.1 矽化鍺汲極擴充P-channel SONOS (SDE-P-SONOS)…………67
4.1.1結構及原理介紹………………………………………………68
4.1.2工作效能………………………………………………………69
4.2 H型矽化鍺掩埋通道P-channel SONOS (H-P-SONOS)………70
4.2.1 結構及原理介紹……………………………………………70
4.2.2 工作效能……………………………………………………71
4.3 U型矽化鍺掩埋通道P-channel SONOS (U-P-SONOS)………73
4.3.1 結構及原理介紹……………………………………………73
4.3.2 工作效能……………………………………………………74
4.4 結論………………………………………………………………75
第五章 矽化鍺捕捉層電荷分佈情況之探討
5.1 N-channel SONOS電荷分佈……………………………………85
5.2 P-channel SONOS電荷分佈……………………………………86
5.2.1 偏壓與捕捉層電荷分佈之關係………………………………87
5.2.2元件尺寸與捕捉層電荷分佈之關係…………………………90
5.3 結論………………………………………………………………92
第六章 結論與未來建議
6.1 結論……………………………………………………………100
6.2未來建議…………………………………………………………101
參考資料……………………………………………………………102

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