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研究生:劉玫諍
研究生(外文):Liu, Mei-Jeng
論文名稱:氧含量對非晶態透明半導體銦鋅錫氧薄膜電晶體特性之研究
論文名稱(外文):Study on the effect of oxygen incorporation on amorphous Indium Zinc Tin Oxide transparent thin film transistors
指導教授:劉柏村劉柏村引用關係林建中林建中引用關係
指導教授(外文):Liu, Po-TsunLin, Chien-Chung
學位類別:碩士
校院名稱:國立交通大學
系所名稱:光電系統研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2013
畢業學年度:102
語文別:英文
論文頁數:44
中文關鍵詞:非晶態透明半導體銦鋅錫氧薄膜電晶體
外文關鍵詞:amorphous Indium Zinc Tin Oxide transparent thin film transistors
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近年來非晶態透明導電膜因具備高透光性與高電流驅動特性而受到矚目,而為了減少材料中稀有金屬的使用及提高載子遷移率的需求,我們研究了新材料indium-zinc-tin oxide(IZTO),對非晶態的IZTO電晶體進行電特性與材料特性的探討與分析。a-IZTO 的光學能隙高達3.6eV以上,僅會吸收波段小於360nm的紫外光,在可見光的波段具有高穿透性,再者a-IZTO在製程上可達到低退火溫度(300℃)與具有高載子移動率等優點,所以極有潛力成為下一代的主流顯示技術。
本研究中,探討不同氧含量的薄膜做為主動層對元件特性的影響,由實驗結果得知,微量的氧能修補薄膜內的缺陷進而達到優化的效果,然而薄膜內的缺陷態卻會隨著氧含量的增加而增加,而載子移動率隨之下降,再者,此實驗中優化的元件在經過低溫退火後的最高載子移動率可達15 cm2/V.s~ 20cm2/V.s。為了能進一步應用在平面顯示器上,我們將此最佳化的條件成功轉移於具可撓曲淺力之超薄(0.13mm)玻璃基板上,實驗結果顯示電晶體依舊能維持不錯的元件特性(載子移動率-12~13 cm2/V.s)。a-IZTO具有高載子移動率與應用於可撓曲超薄玻璃基板之優勢,此研究的發展將極具淺力。

Recently, the thin film transistors (TFTs) with transparent amorphous conductive thin film as active layer perform higher mobility and better reliability than conventional hydrogenated amorphous silicon TFT (a-Si: H TFT). In addition, the uniformity of a-IGZO TFT is also superior to low temperature polycrystalline silicon TFT (LTPS TFT). However, the usage of the rare element(Ga) and further enhancement of device mobility will be an important issue for the long-term applications. In this work, we developed new amorphous oxide semiconductor--- amorphous In-Zn-Sn-O thin film transistors (a-IZTO TFTs). We investigated the effect of oxygen incorporation on a-IZTO thin film transistors. For the devices with different oxygen flow rate incorporation, the small quantity of oxygen can repair defects and optimize the characteristic, however, the trap states increase when oxygen flow rate increases, leading to the decreasing mobility. Moreover, the mobility of the optimized devices after annealing has reached 15 cm2/V.s~ 20cm2/V.s. For the application of flat panel displays, we have successfully transferred the optimized device from Si wafer to the ultra thin glass (0.13mm) which has bending potential. Devices on ultra thin glasses have stable basic electrical characteristics and their mobilities were also comparable (12~13 cm2/V.s). With the advantages of high mobility and ultra thin glass, these results show the future application potentials of a-IZTO TFT devices on flat panel display technology.
Chapter 1
Introduction..........................................1
1.1 General Background................................1
1.2 Amorphous oxide semiconductors....................3
1.2.1 Introduction of Amorphous Oxide Semiconductors..3
1.2.2 Material properties of zinc oxide (ZnO).........3
1.3 Motivation........................................4
1.4 Thesis Organization...............................5

Chapter 2
Experimental Procedures...............................7
2.1 Fabrication flow of thin film transistors.........7
2.2 Electrical Measurement and Parameter Extraction Method ......................................................8
Chapter 3
Results and Discussion...............................14
3.1 The effects of oxygen flow rate and channel thickness on a-IZTO TFTS..........................................14
3.1.1 Characteristic analysis of a-IZTO TFTs with different RF sputtering power..................................14
3.1.2 Characteristic analysis of a-IZTO TFTs with different oxygen flow rate.....................................16
3.1.3 Characteristic analysis of a-IZTO TFTs with different channel thickness....................................18
3.1.4 Summary........................................18
3.2 Reliability Analysis of a-IZTO TFTS..............19
3.2.1 Electrical reliability analysis under gate bias stress .....................................................19
3.2.2 The photosensitivity analysis..................22
3.2.3 Summary........................................24
3.3 Application of a-IZTO TFTs for ultra-thin glass panel .....................................................24
3.3.1 Introduction...................................24
3.3.2 Device structure...............................25
3.3.3 Electrical characteristic analysis.............25
3.3.4 Electrical reliability analysis under gate bias stress .....................................................26
3.3.5 Summary........................................27

Chapter 4
Conclusion...........................................40
4.1 Conclusions......................................40
4.2 Future work......................................41

Reference............................................42



Reference
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