臺灣博碩士論文加值系統

中文摘要
本論文提出一個高共模拒斥比(Common Mode Reject Ratio, CMRR)腦波(electroencephalogram, EEG)量測系統之類比前端電路(Analog Front-End, AFE)。整體AFE電路包含第一級交流耦合電路(AC-Coupling Circuit)，濾除低頻雜訊。第二級具高CMRR的三運算放大器式儀表放大器，提供53.9dB的差模增益及128.2dB的CMRR。第三級為陷波濾波器(Notch Filter)，濾除60Hz市電雜訊。第四級為低通濾波器(Low-Pass Filter, LPF)，濾除250Hz以上的訊號。
整體AFE電路中的儀表放大器採用三運算儀表放大器，並在前端加上交流耦合電路，可在低頻時具有高CMRR，並在後端加入一個放大器當作回授，使儀表放大器的增益更加提升。
濾波器中所採用的放大器為主動電流鏡負載式差動放大器。整體AFE電路的差模增益能達到59.9dB以上，CMRR可達到96.3dB以上。
本論文所設計之AFE電路皆採用台積電(TSMC) SiGe 180nm BiCMOS製程技術進行驗證及模擬，操作電壓±1V，整體AFE電路功率消耗小於9.02μW。



關鍵字：腦波、交流耦合電路、儀表放大器

ABSTRACT
This paper presents an analog front-end (AFE) circuitry of an electroencephalogram (EEG) measurement system with a high common-mode rejection ratio (CMRR). The whole AFE circuit includes a first-stage AC coupling circuit to filter out low frequency noise, a second-stage instrumentation amplifier with a high CMRR of three op amp to provide 53.9 dB differential-mode gain and 128.2 dB CMRR, a third-stage notch filter to filter out 60 Hz mains noise, and a fourth-stage low-pass filter (LPF) to filter out signals above 250 Hz.
The instrumentation amplifier in the whole AFE circuit is a three op amp with an AC coupling circuit added to the front to achieve high CMRR at low frequencies and an amplifier to the rear as a feedback to further enhance the gain of instrument amplifier.
The amplifier used in the filter is the differential amplifier with active current mirror load. The differential-mode gain of the whole AFE circuit can reach 59.9 dB or more with CMRR achieving 96.3 dB or more.
The proposed AFE circuit is simulated and validated by the Taiwan Semiconductor Manufacturing Company Limited (TSMC) Silicon Germanium (SiGe) 180 nm BiCMOS process technology with an operating voltage of ±1 V. The power consumption of the whole AFE circuit is less than 9.02 μW.




Keywords：EEG, AC-coupling circuit, instrumentation amplifier

目錄
口試委員會審定書 #
誌謝 i
中文摘要 ii
目錄 iv
圖目錄 vii
表目錄 ix
Chapter 1 緒論 1
1.1 研究動機 1
1.2 文獻回顧 1
1.2.1 AFE電路的相關文獻 1
1.2.2 交流耦合電路(AC-Coupling circuit)介紹 2
1.2.3 儀表放大器介紹 2
1.2.4 濾波器介紹 2
1.3 研究方向 3
1.4 論文章節安排 5
Chapter 2 腦波簡介與發展 6
2.1 腦波簡介 6
2.2 腦波干擾 9
Chapter 3 整體AFE電路設計 11
3.1 基本簡介 11
3.2 儀表放大器 14
3.2.1 常見的儀表放大器電路架構 14
3.2.2 本論文的儀表放大器電路架構 16
3.2.3 本論文的交流耦合電路 19
3.3 共模拒斥比(CMRR)介紹 20
3.3.1 何謂共模拒斥比(CMRR) 20
3.3.2 本論文如何提高增益 21
3.3.3 本論文如何提高CMRR 22
3.4 濾波器介紹 23
3.5 濾波器的使用 26
3.5.1 低通濾波器 26
3.5.2 陷波濾波器 28
3.6 運算放大器設計 31
3.6.1 OP放大器 31
Chapter 4 軟體模擬結果與分析 34
4.1 儀表放大器 34
4.2 低通濾波器 39
4.3 陷波濾波器 41
4.4 整體電路模擬結果 43
4.5 LAYOUT 45
4.5.1 OP放大器[22](本論文所使用) 45
4.5.2 整體電路佈局圖[21] 48
4.5.3 DRC 49
4.5.4 LVS 50
Chapter 5 結論 51
REFERENCE 52

REFERENCE
[1]G. H. Hamstra, A. Peper and C. A. Grimbergen, “Low- Power, Low -Noise InstrumentationAmplifier for Physiological Signals,” Med. & Biol. Eng, May 1984.
[2]T. Degen and H. Jäckel, “Enhancing Interference Rejection of Amplifying Electrodes by Automated Gain Adaption,” IEEE Trans.Biomed. Eng,Vol. 51, No. 11, pp. 2031–2039, Nov. 2004.
[3]A. C. Metting-van Rijn, A. Peper, and C. A. Grimbergen,“High-Quality Recording of Bioelectric Events. Part 1. InterferenceReduction, Theory and Practice”, Med. Biol. Eng. Comput, Vol. 28,No. 5,pp. 389–397, Sep. 1990.
[4]A. C. Metting-van Rijn, A. Peper, and C. A. Grimbergen,“High-Quality Recording of Bioelectric Events. Part 2. Low-Noise,Low-Power Multichannel Amplifier Design”, Med. Biol. Eng.Comput, Vol. 29, No. 4, pp. 433–440, Jul. 1991.
[5]M. Fernandez Chimeno and R. Pallas-Areny, “A Comprehensive Model for Power Line Interference in Biopotential Measurements,” IEEE Trans. Instrum. Meas, Vol. 49, No. 3, pp. 535–540, Jun. 2000.
[6]Thomas Degen. “Enhancing Interference Rejection of Preamplified Electrodes by Automated Gain Adaption,” IEEE Trans Biomed. Eng, Vol. 51, No. 11,Nov. 2004.
[7]Enrique Mario Spinelli. “AC-Coupled Front-End for Biopotential Measurements,” IEEE Trans Biomed Eng, Vol. 50, No. 3,Mar. 2003.
[8]Baker, Bonnie, “CMRR not created equal for all INAs,” Electronics World, Dec. 2008.
[9]黃進強(民97)交流耦合平衡增益之腦波量測系統(碩士論文)。(系統編號095NCU05442061)
[10]陳鈺融(民97)一個新型應用於生醫系統之類比前端電路(碩士論文)。(系統編號096TIT05652073)
[11]R. R. Harrison, “A low-Power Low-Noise CMOS Amplifier for Neural Recording Applications,” IEEE J. Solid-State Circuit, Vol. 38, No. 6, pp. 958–965,Jun. 2003.
[12]W. Allen, Active Filter Design, Boston, McGraw-Hill, 1991.
[13]J. D. Devi and P. V. Ramakrishna, “Design of CMOS Instrumentation Amplifier Using gm/ID Methodology,” Proc. Int. Conf. Circuit, cont. Comp, Nov. 2014, pp. 29‐32.
[14]H. Alzaher and M. Ismail, “A CMOS Fully Balanced Differential Difference Amplifier and Its Applications,” IEEE Trans. Circuit Syst. II: Analog and Digital Signal processing, Vol. 48, No. 6, pp. 614‐620,Jun. 2001.
[15]關尚勇，林吉合(民91)破解腦波。初版:藝軒圖書出版社。
[16]許念祖(民97)。利用雜訊抵銷技術之低雜訊放大器設計與分析 (碩士論文)。(系統編號096NSYS5442161)
[17]Oscar Casas. “Fully Differential AC-Coupling Networks: A Comparative Study,” IEEE Trans. Instrum. Meas, Vol. 58, No. 1, pp. 94‐98 ,Jan. 2009.
[18]Behzad Razavi(2001).Design of Analog CMOS Integrated Circuits, International Edition.
[19]張晉嘉(民90)。生醫電訊號量測之市電干擾移除 (碩士論文)。(系統編號089NTU00442185)
[20]R. C. Gonzalez, R. E. Woods, “Digital Image Processing second edition,” Prentice Hall.2002.
[21]S. Grimmes and Ø. G. Martinsen. “Bioimpedance and Bioelectricity Basics,” London, U.K.Academic. 2000.
[22]von Bünau P, Meinecke F C, Scholler S, Müller K-R.“Finding Stationary Brain Sources in EEG Data,” IEEE EMBC , pp. 2810‐2813,Aug. 2010.
[23]Yue-Der Lin,Chang-Da Tsai,Hui-Hsun Huang,Dah-Chuan Chiou,Chien-Ping Wu . “Preamplifier with a second-Order High-Pass Filter Characteristic,” IEEE Trans Biomed Eng, Vol. 46, No. 5, pp. 609‐612 ,May 1999.
[24]Chien-Jung Chou, Bing-Jye Kuo, “A 1-V Low-Noise Readout Front-End for Biomedical Applications in 0.18-μm CMOS,” VLSI-DAT,pp. 295-298,Apr. 2010.
[25]Meiying Wen, Yayu Cheng, Ye Li, “A Full Custom Analog Front-End for Long-time ECG Monitoring,” IEEE EMBS, pp.3234‐3237 ,Jul. 2013.
[26]Franco,SergioDesign with operational amplifier and analog integrated circuits, Third edition, McGraw-Hill, New York, 2002.