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研究生:蕭文彥
研究生(外文):Wen-Yan Hsiao
論文名稱:高效率2.6GHzCMOSDoherty功率放大器
論文名稱(外文):Design of A High-Efficiency 2.6GHz CMOS Doherty Power Amplifier
指導教授:劉萬榮吳 渝
指導教授(外文):Wan-Rone LiouYu Wu
學位類別:碩士
校院名稱:國立臺灣海洋大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2007
畢業學年度:95
語文別:中文
論文頁數:60
中文關鍵詞:功率放大器輸出功率輸出效率線性度Doherty功率放大器
外文關鍵詞:power amplifieroutput powerPAElinearityDoherty power amplifier
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隨著無線通訊的快速發展,許多無線通訊方面的應用亦隨之發展。射頻功率放大器在無線通訊系統中的使用時間方面是非常重的關鍵性元件,因為它在射頻收發器中佔用了60%到90%的能量消耗。此外,輸出功率決定了通訊距離的長短,輸出效率(PAE)則決定了功率消耗程度,如:通訊產品的使用時間。然而,功率放大器在追求效率和線性度上是相抵觸的。在高效率功率放大器的範疇內,Doherty功率放大器除了架構簡單外,亦具備了較佳的輸出功率和線性度。在線性功率放大器裡,A類功率放大器具有高線性度的特性,而AB類功率放大器具有高輸出效率的特性。因此,在本論文裡,我們結合了A類和AB類功率放大器的優點組合而成Doherty功率放大器來達成高線性度和高效率功率放大器的目標。電路的實現是利用TSMC 0.18μm 1P6M 之CMOS製程。本電路的偏壓電源為1.8伏特。在兩個功率放大器作動的情況下,功率放大器之工作電流為482mA,最大輸出功率為21.7dBm,最大增益為13.3dB,最大效率可達48%。

關鍵字: 功率放大器,輸出功率, 輸出效率, 線性度, Doherty功率放大器, CMOS
As the rapid development of mobile communications, many applications make use of wireless communication to carry their works out. The radio frequency (RF) power amplifier plays a crucial role in mobile devices for survival since it dominates about 60 to 90% of the energy consumptions in the RF transceiver. Moreover, the output power will decide the communication range and the power-added efficiency (PAE) will affect the degree of the power consumption, i.e., the surviving time of the mobile device. However, it is conflict to design a power amplifier so that it both enhances the PAE and its linearity. In the applications of highly efficient power amplifier, the Doherty power amplifier not only has a simple architecture but also has a better output efficiency and linearity. Moreover, in the linear power amplifier, the class A power amplifier has the characteristic of higher linearity and the class AB power amplifier has the characteristics of higher output efficiency. Thus, in this thesis, we combine the merits of both class A and class AB power amplifier with Doherty power amplifier to achieve the goal of high linearity and efficiency of power amplifier. The implementation of the designed circuit is based on TSMC 0.18μm 1P6M CMOS process. The bias power supply of the circuit is 1.8 voltage. When the circumstance of two amplifiers being activated, the electric current is 482 mA, the maximum output power is 21.7 dBm, the maximum power gain is 13.3 dB and the maximum power efficiency will reach 48%.
Keyword:power amplifier, output power, PAE, linearity, Doherty power amplifier, CMOS
第一章 緒論 1
1.1 研究背景 1
1.2 研究動機 1
1.3章節規劃 3
第二章 功率放大器 5
2.1 功率放大器的分類 5
2.1.1線性功率放大器 5
2.1.2非線性功率放大器 11
第三章 功率放大器設計 15
3.1 Doherty放大器原理: 15
3.2 設計Doherty功率放大器 26
3.3穩定度分析: 31
3.4結合Wilkinson電路 36
3.5電路設計流程 39
第四章 模擬結果 41
4.1設計結果 41
4.1.1一般考量 41
4.1.2製程變異度的考量 47
4.1.3預計規格表 52
4.2測試考量 53
4.3佈局 54
4.4問題與討論 55
第五章 結論和未來展望 56
5.1 結論 56
5.2 未來展望 56
參考文獻 58
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