一、中文參考文獻
唐永成 (2002)。印刷電路板製造資料模型建構與成本分析。碩士論文,元智大學,工業工程與管理研究所。葉財榮 (2003)。多目標平行機台之動態排程之研究-以印刷電路板為例。輔仁大學,應用統計學研究所。陳純敏 (2003)。1,3-二辛酸-2-棕櫚酸甘油酯特化油脂之最優化研究。大葉大學,食品工程學系碩士班。戴金琪 (2002)。以反應曲面法改善銅導線晶圓封裝之銲線製程問題。元智大學,工業工程與管理研究所。蘇筵仁 (2003)。應用田口方法於0201被動元件製程參數最優化。華梵大學,工業管理學系碩士班。黃韋誠 (2003)。曲面法探討鱈魚魚漿製品最適化之研究。屏東科技大學,食品科學系碩士班。張淑微 (2002)。究酵素合成己醇酯類之最優化。大葉大學,食品工程學系碩士班。
林悅慈 (1999)。以統計方法分析與設計半導體生產製造系統。台灣大學,工業工程學研究所。蔡政憲 (2001)。實驗設計法應用於鎳鋅共鍍層氫氣產生最佳化之探討。中正大學,化學工程研究所。蔡聰男 (2003)。自適應式表面黏著製程品質預測控制系統之發展。成功大學,製造工程研究所。葉俊吾 (2002)。運用類神經網路建構SMT錫膏印刷製程品質管制系統。成功大學,製造工程研究所。謝欣宏 (2002)。台鐵司機排班與輪班問題之研究-以基因演算法求解。成功大學,交通管理科學研究所。林慈傑 (2001)。以遺傳演算法求解類運輸問題模式化的多廠訂單分配問題。台灣大學,工業工程學研究所。段麗莉 (2004)。使用演化式演算法最佳化彈性製造系統之生產規劃。逢甲大學,資訊工程學系碩士班。
許博傑 (2000)。實數編碼與二位元編碼遺傳演算法之性能比較研究。台灣科技大學,機械工程系。蘇朝墩 (2002)。品質工程。中華民國品質學會。
陳順宇,鄭碧娥 (2002)。實驗設計。華泰書局。
白蓉生 (2001)。電路板規範手冊。臺灣電路板協會。
二、英文參考文獻
Alvarez, R. A., et al., 1988, Application of Statistical Design and Response Surface Methods to Computer–Aided VLSI Device Design, Transactions on Computer–aided Design, Vol. 7, No. 2, pp. 272-288.
Bjorndahl, D. W., et al., 1997, Surface Mount Technology–Capabilities and Requirements, Electronic Systems and Technology Division One Space Park, pp. 285-291.
Barajas, G. L., et al., A Closed–Loop Control Algorithm for Stencil Printing, Center for Board Assembly (CBAR).
Chroneos, R. J., Mallik, D., and Prough, S. D., 1993, Packaging Alternatives for High Lead Count, Fine Pitch, Surface Mount Technology, IEEE Transaction on Components, Hybrids, and Manufacturing Technology, Vol. 16, No. 4, pp. 396-401.
Design-Expert 6 User’s Guide, 2001, Stat-Ease, Inc., Minneapolis.
Evans, W. J., and Beddow, J. K., 1987, Characterization of Particle Morphology and Rheological Behavior in Solder Paste, IEEE Transactions on Components, Hybrids, and Manufacturing Technology, Vol. 10, No. 2, pp. 224-231.
Franklin, M. F., 1984, Constructing Tables of Minimum Aberration pn-m Designs, Technometrics, Vol. 26, pp. 225-232.
Fledmann, K. and Stum, J., 1994, Closed Loop Quality Control in Printed Circuit Assembly, IEEE Transactions on Components, Hybrids, and Manufacturing Technology – Part A, Vol. 17, No. 2, pp. 270-276.
Gerjan, 2002, Defining the Correct Soldering Process, Circuits Assembly, No. 12, 13, pp. 26-29.
Herrera, F., Lozano, M. and Sanchez, A. M., Hybrid Crossover Operators for Real–Coded Genetic Algorithms : An Experimental Study.
Hollomon, J. K., 1989, Surface-Mount Technology for PB Board Design, I.N. Howard W. Sams & Company, New York.
Hwang, J. S, 1992, Solder Paste in Electronics Packaging, Van Nostrand Reinhold, New Jersey.
Ho, S. L., Xie, M., and Goh, T. N., 2003, Process Monitoring Strategies for Surface Mount Manufacturing Processes, The International Journal of Flexible Manufacturing System, Vol.(No), 15, pp. 95-112.
IPC-A-610C, 2000, Acceptability of Electronic Assemblies, The Institute for Interconnecting and Packaging Electronic Circuits, Northbrook, Illinois.
Joshi, S., Sherali, H., and Tew, J., 1998, An Enhanced Response Surface Methodology (RSM) Algorithm Using Gradient Deflection and Second–Order Search Strategies, Computers Ops Res. Vol. 25, No. 7/8, pp. 531-541.
Kolli, V., G., Maria, F. G., and Anderson, R., 1997, Rheological Characterization of Solder Pastes for Surface Mount Applications, IEEE Transactions on Components, Packaging, and Manufacturing Technology – Part B, Vol. 20, No. 4, pp. 416-423.
Lathrop, R. R., and Schauberger, K., The SMT Process Benchmarking Toolkit
The Quick Pocket Reference for Solder Assembly, AIM, 2000.
Lathrop, R. R., 1997, Solder Paste Print Qualification Using Laser Triangulation, IEEE Transaction on Components, Packaging, and Manufacturing Technology – Part C, Vol. 20, No. 3, pp. 174-182.
Lau, J., H., et al., 2000, Experimental & Statistical Analyses of Surface-Mount Technology PLCC Solder-Joint Reliability, IEEE Transactions of Reliability, Vol. 37, No. 5, pp. 524-530.
Lau, F., and Yeung, V., 1997, A Hierarchical Evaluation of the Solder Paste Printing Process, Journal of Materials Processing Technology, Vol. 69, pp. 79-89.
Lee, W., et al., 1998, A Comparative Study of Five Parallel Genetic Algorithms Using the Traveling Salesman Promlem, IPPS/SPDP IEEE.
Lin, C. L., and Lai, R. M., 2001, Parameter Design for a Guidance and Control System Using Genetic Approach, Aerosp. Sci. Technol, Vol. 5, pp. 425-434.
Montgomery, D. C., 2001, Design and Analysis of Experiments, John Wiley & Sons, Inc.
Morris, J. R., and Wojcik, T., 1991, Stencil Printing of Solder Paste for Fine-Pitch Surface Mount Assembly, IEEE Transactions on Components, Hybrids, and Manufacturing Technology, Vol. 14, No. 3, pp. 560-566.
Morris, R. J., and Wojcik, T., 1991, Stencil Printing of Solder Paste for Fine–Pitch Surface Mount Assembly, IEEE Transactions on Components, Hybrids, and Manufacturing Technology, Vol. 14, No. 3, pp. 560-566.
Okura, T., et al., 1995, Optimization of Solder Paste Printability with Laser Inspection Technique, OKI Electric Industry Co., Ltd Takasaki – shi, Gumma, Japan.
Oyama, A., Obayashi, S., and Nakamura, T., 2001, Real–Coded Adaptive Range Genetic Algorithm Applied to Transonic Wing Optimization, Applied Soft Computing, Vol. 1, pp. 179-187.
Pan, J., et al., 1999, Critical Variables of Solder Paste Stencil Printing for Micro–BGA and Fine Pitch QFP, Proceedings of IEEE/CPMT International Electronics Manufacturing Technology (IEMT) Symposium, Austion, TX, No. 18-20, pp. 94-101.
Pan, J., 2000, Modeling and Process Optimization of Solder Paste Printing for Fine Pitch Surface Mount Assembly, Ph.D. Dissertation, Lehigh University, Bethlemhem, PA.
Response Surface Designs, 2003, Minitab Inc.
Rocak, D., Stopar V., and Plut, J. F., 1995, Solder Paste for Fine Line Printing in Hybrid Microelectronics, Microelectronics Journal, Vol. 26, pp. 441-447.
Rajkumar, D., Nguty, T., Ekere, N. N., 2000, Optimising Process Parameters for Flip Chip Stencil Printing Using Taguchi’s Method, IEEE/CPMT Int’l Electronics Manufacturing Technology Symposium.
Tasi, T. N., 2000, Solder Defect Analysis, Technical Report, Kaohsiung, Taiwan.
Tasi, T. N., 2005, Development of an integrated reflow soldering control system Using Incremental Hybrid Process Knowledge, Expert Systems with Applications, Vol. 28, pp. 681-692.
Tang, L. C., and Xu, K., 2002, A Unified Approach for Dual Response Surface Optimization, Journal of Quality Technology, Vol. 34, No. 4, pp. 437-447.
Toro, F. D., et al., 2002, PSFGA : A Parallel Genetic Algorithm for Multiobjective Optimization, IEEE proceedings of the 10th Euromicro Workshop on Parallel, Distributed and Network – based Processing.
Todoroki, A., Ishikawa, T., 2004, Design of Experiments for Stacking Sequence Optimizations with Genetic Algorithm Using Response Surface Approximation, Composite Structures, Vol. 64, pp. 349-357.
Thomas, G. M., et al., 1995, Using Real–Coded Genetic Algorithms for Weibull Parameter Estimation, Computers and Engng, Vol. 29, No. 1-4, pp. 377-381.
Walker, A., and Baldwin, F. D.,1999, Initial Investigations into Low-Cost Ultra–Fine Pitch Solder Printing Process Based on Innovative Laser Printing Technology, IEEE Transactions on Electronics Packaging Manufacturing, Vol. 22, No. 4, pp. 303-307.
Yegnasubramanian, S., Deshmukh, R., et al., 2000, Designed Experiment to Assess the Surface Mount Attachment Reliability of 14mil Pitch (1000 I/O) Underfilled DCA, IEEE/CPMT Int’L Electronics Manufacturing Technology Symposium.