臺灣博碩士論文加值系統

近年來，隨著高速電腦及無線通訊系統快速發展，許多積體電路的時脈速度已邁入數百MHz甚至到數十GHz，在如此高的頻率之下，相對於上升時間會縮短，這使得構裝本身的電氣寄生效應會顯著影響到數位邏輯電路時序的正確性與雜訊大小，因此建立電子封裝電氣特性等效模型與高速數位訊號完整性分析，將是個刻不容緩的課程。
本論文的研究待測物以迷你BGA（mini Ball Grid Array）為主，利用向量網路分析儀對待測物進行全雙埠散射參數量測，在量測方面採用HP GigaTest Labs量測標準，得到封裝導線之散射參數頻域響應，並利用HP ADS（Advanced Design System）軟體建立封裝導線等效集總模型與離散模型，再配合最佳化功能，萃取出等效電路元件參數值，建立符合實際量測之高速電氣模型。為了驗證模型的正確性，將建立好的電氣模型利用ADS模擬其散射參數頻域響應，再與量測值作一比對。在電磁模擬方面，利用Ansoft Maxwell Quick 3D Parameter Extractor軟體，模擬封裝導線的電感與電容矩陣，用以驗證等效模型元件值。最後利用HSPICE軟體針對封裝導線的訊號完整性作分析，探討電子構裝電氣特性對高速數位電路之影響，以提供IC設計工程師一個良好的參考依據。

As high-speed computers and wireless communications systems have accomplished a remarkable development in recent years, the clock speed in many integrated circuits reaches hundreds megahertz or tens gigahertz. At such a high frequency, the rise time of the signal is relatively shortened. As a result, electrical parasitic effects on the packages will significantly degrade the sequential timing and noise performances on digital logic circuits. Therefore, it is an important task to establish the equivalent models for electrical characteristics on packages and to analyze the signal integrity of high-speed digital signals.
The research objective in this thesis focuses on mBGA (mini Ball Grid Array). Full two-port scattering parameter was measured on devices under test with a vector network analyzer. The measurement standard from HP GigaTest Labs was adopted for measurement of frequency domain response on scattering parameters. In addition, the HP ADS (Advanced Design System) software was employed to establish the lumped and discrete models for package conductor wires. With the optimization capability of the ADS, electrical model was established with satisfactory accuracy. The validity of the model was confirmed by a comparison between scattering parameters from ADS simulation and from measurement. In respect of the electromagnetic simulation, in order to verify the equivalent circuit model for the package wires, the Ansoft Maxwell quick 3D Parameter Extractor software was used to calculate the inductance and capacitor matrices. Finally, HSPICE was applied to analyze the signal integrity of the conduction wires in the package.

目錄
中文摘要
英文摘要
致謝
目錄
表目錄
圖目錄
第一章緒論
1.1 電子構裝的演進
第二章電子構裝之高頻量測技術
2.1時域反射分析儀（TDR）原理
2.2向量網路分析儀（VNA）原理
2.2.1向量網路分析儀校正
2.3 miniBGA簡介
2.4 量測環境的簡介
2.4.1 測試夾具
2.4.2 去埋藏法（de-embedding）
2-5 量測腳位的決定
第三章 電子構裝等效模型的建立與模擬
3.1集總模型的建立
3.1.1雜散電感萃取
3.1.2雜散電容萃取
3.1.3 電氣參數R/L/C
3.1.4高頻效應
3.2頻域量測與模型模擬結果之比較
3.2.1測試夾具的效應
3.2.2 封裝導線效應
3.3離散模型的建立
3.3.1耦合傳輸線與離散電路轉換公式
3.3.2耦合傳輸線模型參數萃取與模擬
3.3.3離散模型
第四章 電子構裝之電磁模擬
4.1 Quick 3D軟體之原理
4.1.1電容的計算
4.1.2 Multi-pole電容計算
4.1.3 Parial電感計算
4.1.4 Multi-pole電感計算
4.2 Maxwell Q3D Parameter Extractor模擬流程
4.3電磁模擬參數萃取結果
4.4電磁模擬與集總模型參數比較
第五章 信號完整性分析
5.1 瞬間切換雜訊之原理
5.1.1 瞬間切換雜訊之模擬
5.1.2改善方式
5.2 串音雜訊之原理
5.2.1串音雜訊之模擬
5.2.2改善方法
第六章 結論
參考文獻
附錄

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