臺灣博碩士論文加值系統

本論文主要目的是將CMOS 溫度感測器與超取樣類比/數位介面電路整合於相同之晶片上，並產生八位元之數位輸出。溫度感測元件主要是利用雙載子電晶體之基-射極電壓，當雙載子電晶體偏壓在接近PTAT電流時，基-射極電壓會隨溫度而呈線性之變化，因此是非常好的溫度感測元件。雙載子電晶體在CMOS製程之實現方式為利用垂直基底等效之PNP電晶體來實現。

超取樣類比/數位介面電路架構為一階連續時間調變器，其原理主要就是對輸入訊號作超取樣、並利用回授的方式將量化器之雜訊頻譜修整至高頻，最後再利用計數器降頻取樣並把高頻雜訊濾除掉，產生八位元之數位輸出訊號。所設計之電路經由台灣積體電路製造公司(TSMC)之0.35μm 2P4M製程來實現，整個溫度感測器包含pad面積為1400×1400 μm2，溫度從-10 oC至60 oC量測結果顯示感測器轉換時間為2.56 ms、解析度為0.29 oC、精準度誤差則為0 ~ -3.28 oC。經由一點校正後，感測器精準度誤差可以降低至±1.64 oC以內。

為了實現一個不受溫度與至製程變異影響之能帶隙參考電壓，我們利用截波技術來降低放大器之偏移電壓與低頻雜訊，經由晶片量測結果可以證實得到一個非常穩固、不受製程變異影響的參考電壓，其值在常溫下為1.206V，溫度係數最差可從146.2 ppm/℃改善至56.9 ppm/℃，相對誤差也從0.53 % 改善至0.25 %。

The aim of this thesis is to integrate both CMOS Temperature Sensor and Oversampled analog/digital interface circuit on the same chip, and produce digital output with eight-bits resolution. The architecture of oversampled analog/digital interface is a first order continuous-time ΔΣ converter, which is based on oversampling, feedback and filtering of the quantization error. In order to verify the Oversampled analog/digital interface circuit, a PTAT sensor is developed with CMOS parasitic substrate PNP transistor. Furthermore, with a bandgap reference circuit as a example, so-called chopper technique is employed to reduce the offset and lower-frequency noise of the operational amplifier. The temperature- sensing signal is converted by ΔΣ modulator into one-bit digital signal with higher frequency and then down-sampled by eight-bit counter. All the circuits are implemented in TSMC 0.35μm 2P4M process.
For 3V supply voltage, the conversion time of converter is 2.56ms, the resolution and accuracy error of temperature sensor is 0.29 oC and 0 ~ -3.28 oC in the temperature range from –10 oC to 60 oC. The accuracy error can reduce to within ±1.64 oC with one-point calibration at 15 oC. Besides, the measured results show that the choppered bandgap is very stable against process variation. The output voltage is 1.206V at 25 oC. The temperature factor with and without chopper technique is 146.2ppm/ oC and 56.9ppm/ oC, respectively. And hence get an improvement of relative error from 0.53 % to 0.25 % in the worst case.

中文摘要………………………………………………………………………i
英文摘要………………………………………………………………………ii
誌謝……………………………………………………………………………iii
目錄……………………………………………………………………v
圖目錄……………………………………………………………………vii
表目錄…………………………………………………………………viii
第一章 緒論………………………………………………………………01
1.1 研究背景…………………………………………………………01
1.2 研究動機……………………………………………………………04
1.3 論文架構…………………………………………………………06
第二章 CMOS溫度感測器………………………………………………07
2.1 常見溫度感測器種類………………………………………………08
2.2 溫度感測器原理與設計考量………………………………………09
2.2.1 CMOS Substrate PNP電晶體…………………………10
2.2.2 VBE溫度感測器…………………………………………11
2.2.3 PTAT溫度感測器………………………………………16
2.3 CMOS能帶隙電壓參考電路…………………………………17
2.3.1 原理說明…………………………………………………17
2.3.2 設計考量…………………………………………………18
2.3.3 模擬結果…………………………………………………20
第三章 超取樣介面電路設計 …………………………………………21
3-1 原理說明…………………………………………………………21
3.1.1 超取樣……………………………………………………21
3.1.2 雜訊修整…………………………………………………23
3-2 電路架構說明……………………………………………………27
3.2.1連續時間與離散時間調變器比較…………………………27
3.2.2一階連續時間調變器電路分析……………………………28
3-3 電路設計與模擬……………………………………………………32
3.3.1準位調整電路………………………………………………32
3.3.2偏壓電路……………………………………………………33
3.3.3放大器………………………………………………………35
3.3.4比較器………………………………………………………39
3-4 量測結果與討論……………………………………………………43
第四章 使用截波技術之能帶隙參考電壓設計………………………49
4-1 CMOS放大器非理想特性…………………………………………50
4.1.1偏移電壓……………………………………………………50
4.1.2雜訊………………………………………………………51
4-2 動態偏移消除技術………………………………………………52
4.2.1自動歸零技術………………………………………………53
4.2.2截波技術……………………………………………………54
4-3 截波放大器設計……………………………………………………58
4-4 截波能帶隙參考電壓設計………………………………………63
4.4.1能帶隙參考電路誤差來源…………………………………63
4.4.2電路設計……………………………………………………65
4.4.3量測結果……………………………………………………67
第五章結論與未來展望……………………………………………74
5-1 結論…………………………………………………………74
5-2 未來展望……………………………………………………74
參考文獻…………………………………………………………………75


圖 目 錄

圖1-1 智慧型感測器方塊與訊號處理圖…………………………………03
圖2-1 溫度感測器方塊圖……………………………………………………07
圖2-2 熱電偶測溫原理圖………………………………………………………08
圖2-3 CMOS Substrate PNP電晶體之剖面圖…………………………10
圖2-4 CMOS Substrate PNP電晶體之佈局平面圖…………………………11
圖2-5 Substrate PNP電晶體IC-VBE在不同溫度下之模擬圖………………12
圖2-6 雙載子電晶體VBE對溫度變化之關係圖………………………………13
圖2-7 Substrate PNP電晶體VBE在不同IC下對溫度變化模擬圖……………14
圖2-8 Substrate PNP電晶體VBE對溫度變化量測圖…………………………15
圖2-9 能帶隙參考電壓原理圖………………………………………………17
圖2-10 能帶隙參考電壓電路圖………………………………………………18
圖2-11 能帶隙參考電壓對溫度與供應電壓變化關係圖………………………20
圖2-12 能帶隙參考電壓電路PSRR之頻率響應圖……………………………20
圖3-1 溫度感測器系統架構圖……………………………………………21
圖3-2 奈奎式與超取樣率量化雜訊功率頻譜圖………………………………22
圖3-3 雜訊修補調變器及其線性模型圖………………………………………24
圖3-4 雜訊修整轉移函數大小與頻率關係圖…………………………………27
圖3-5 連續時間調變器架構圖…………………………………………………28
圖3-6 連續時間調變器原理圖，輸出為Low……………………………………29
圖3-7 連續時間調變器原理圖，輸出為High……………………………………29
圖3-8 積分器與調變器輸出關係圖……………………………………………30
圖3-9 FIR濾波器原理架構圖…………………………………………………31
圖3-10 準位調整電路圖………………………………………………………32
圖3-11 準位調整電路模擬結果圖……………………………………………33
圖3-12 偏壓電路設計圖………………………………………………………34
圖3-13 偏壓電路模擬圖………………………………………………………34
圖3-14 二級放大器電路圖………………………………………………………35
圖3-15 二級放大器電路模擬圖………………………………………………38
圖3-16 比較器電路圖…………………………………………………………39
圖3-17 栓鎖電路輸出對時間響應圖……………………………………………40
圖3-18 連續時間調變器模擬結果圖……………………………………………41
圖3-19 數位電路方塊圖…………………………………………………………42
圖3-20 CMOS溫度感測器晶片之微照相圖……………………………………43
圖3-21 調變器於不同溫度下之輸出量測圖……………………………………44
圖3-22 溫度/數位轉換器量測取樣分布圖………………………………………45
圖3-23 溫度/數位轉換器轉移曲線圖……………………………………………47
圖3-24 溫度/數位轉換器誤差量測圖……………………………………………47
圖4-1 放大器偏移電壓圖………………………………………………………50
圖4-2 CMOS放大器雜訊功率頻譜圖…………………………………………51
圖4-3 自動歸零原理圖…………………………………………………………53
圖4-4 自動歸零放大器雜訊頻譜圖……………………………………………54
圖4-5 截波技術基本架構圖……………………………………………………55
圖4-6 截波技術架構VA、VB、VC頻譜圖……………………………………56
圖4-7 雜訊與截波頻率之關係圖…………………………….…………………56
圖4-8 截波技術時間領域分析圖…………………………….…………………57
圖4-9 截波放大器雜訊頻譜圖…………………………………………………58
圖4-10 截波調變器電路圖………………………………………………………58
圖4-11 截波放大器電路圖…………………………………………………….59
圖4-12 棘波產生圖……………………………………………………………….60
圖4-13 殘餘偏移電壓產生圖……………………………………………………60
圖4-14 不同截波頻率下之截波器輸出模擬圖………………………………...…61
圖4-15 能帶隙參考電壓電路非理想特性分析圖………………………………63
圖4-16 截波能帶隙參考電壓電路圖……………………………………………65
圖4-17 截波能帶隙電路放大器於不同頻率下之模擬圖………………………66
圖4-18 截波能帶隙電路之輸出模擬圖……………………………………67
圖4-19 截波能帶隙電路之微照相圖……………………………………………67
圖4-20 截波能帶隙電路放大器於不同頻率下之量測圖………………………68
圖4-21 截波能帶隙電路放大器之雜訊頻譜量測圖……………………………69
圖4-22 經由濾波後之截波能帶隙電路輸出量測圖……………………………69
圖4-23 截波能帶隙電路輸出低頻雜訊量測圖…………………………………70
圖4-24 不具截波與截波能帶隙參考電路對溫度變化之輸出量測圖…………71
圖4-25 不具截波與截波能帶隙參考電路輸出電壓之誤差圖…………………72
圖4-26 截波能帶隙電路在常溫下之輸出電壓對不同截波頻率量測圖………73


表 目 錄

表1-1 溫度感測器主要規格………………………………………………………05
表3-1 溫度感測器量測統計表…………………………………………………46
表3-2 溫度感測器量測與預計規格比較表………………………………………48
表4-1 溫度感測器成本花費表……………………………………………………49
表4-2 溫度係數與常溫下輸出電壓比較表……………………………………72

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