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研究生:林振添
研究生(外文):ChengTien Lin
論文名稱:在ATM交換機內IP封包與ATM細胞之整合服務研究
論文名稱(外文):Integrated Services of IP Packets and ATM Cells in an ATM Switch
指導教授:竇奇
指導教授(外文):Chie Dou
學位類別:碩士
校院名稱:國立雲林科技大學
系所名稱:電機工程技術研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2000
畢業學年度:88
語文別:中文
論文頁數:80
中文關鍵詞:IP封包與ATM細胞共同排程、ATM 交換機、封包等級排程、SCFQ演算法、整合性服務
外文關鍵詞:IP packets and ATM cells common scheduling、ATM Switch、packet-level scheduling、SCFQ algorithm、integrated service
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  • 被引用被引用:0
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  • 下載下載:23
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未來網路中需以提供非連結導向及連結導向服務在多媒體環境,而IP與ATM 是主要兩種形態範例。以非連結導向IP服務是較為應用於瀏覽、電子郵件以及其他非即時性的服務;而在服務上需要提供品質及即時性傳送時,以連結導向的ATM則是較被為推從的。整合交換系統架構的提議在IP封包(packet)與ATM的訊務(traffic)能夠同時被控制,其基本在於一個階層式記憶系統。而當整合不同形態的多媒體訊務利用ATM交換機傳送在同一線路上,有效使用傳輸在ATM網路是有實際上的重要性。我們分析在不同佇列(queue) 對應在訊務形態及幾個訊務等級(佇列優先權)上的表現,以及研究如何管理及合併IP封包產生細胞和ATM細胞(cell)在ATM交換機中。在本文中,我們採用封包等級排程和服務品質控制於IP-over-ATM網路,最後,我們採用 SCFQ ( Self-Clock Fair Queuing)演算法來完成具有優先權及公平性服務排程來整合IP/ATM訊務提供具區別性服務需求。
Future networks need both connectionless and connection-oriented services to apply in multimedia environment. IP and ATM are major example of two types. Connectionless IP is more efficient for browsing, e-mail, and other non-real-time service; but for services demanding quality and real-time delivery, connection-oriented ATM is a much better candidate. An integrated switching-system architecture is proposed in which IP-packet and ATM traffic can be handled simultaneously. It is based on a hierarchical memory system. Effectively utilizing transmission in an ATM network is particularly important when integrating various kind of multimedia traffic to be sent over one line by ATM switch. We analyze the performance of different queue mapping between traffic types and the number of available traffic classes (priority queues), and we study how to manage and merge that cells of a given IP packet and ATM cell in ATM switch. In the paper, we adopt packet-level scheduling and QoS control in IP-over-ATM networks. Finally, we adopt the Self-Clock Fair Queuing ( SCFQ ) algorithm to achieve priority / fair service scheduling and to integrate ATM/IP traffic provides different services ( DiffServ) requirements.
第一章、緒論 ---------------------------------------------- 1
第一節 研究動機 ------------------------------------- 1
第二節 研究目的 ------------------------------------- 2
第三節 研究方法與內容 ------------------------------- 3
第四節 各章提要 ------------------------------------- 4
第二章、訊務型式、排程、演算法及Switching Router 簡介 ----- 5
2.1 七種訊務型式之簡介 ---------------------------------- 5
2.2 訊務型式與應優先權等級之對應 ------------------------ 6
2.3 演算法的要求 ---------------------------------------- 8
2.4 演算法的分類 ---------------------------------------- 9
2.5 SCFQ演算法的介紹 ----------------------------------- 10
2.6 時間要求及排程簡化 --------------------------------- 12
2.6.1 封包排程時間限制 ------------------------------ 12
2.6.2 有效長度及分類式排程 ------------------------------ 13
2.7 Switching Router 技術發展趨勢 ---------------------- 14
第三章、優先權佇列系統 ----------------------------------- 16
3.1 簡介 ----------------------------------------------- 16
3.2 計算平均等待時間(Calculating Average Waiting Times) 17
3.3 守恆定律與佇列對應(Conservation Law and Queue appings) ----------------------------------------------- 19
第四章、IP-over ATM(IPOA) ------------------------------ 21
4.1 技術概要 ------------------------------------------- 21
4.2 交換機架構(Switch Architecture)------------------- 24
4.3 模組化與分析(Modeling and Analysis)--------------- 26
4.4 計算平均延遲時間(Calculating Mean Waiting Time)--- 27
4.5 訊務形態及訊務等級佇列分析(Analysis of Queue Mapping between Traffic Types and Traffic classes)--------------- 29
4.6 數值分析(Numerical Results)----------------------- 35
4.7 結論及討論(Conclusions and Discussions)----------- 44
第五章、SCFQ排程結合ATM細胞與IP封包 ---------------------- 45
5.1 ATM與IP共同排程 (ATM and IP Common Scheduling) ----- 45
5.2 硬體實現 ( Hardware Implementation ) --------------- 48
5.2.1 CAM-base 排程器 ( Scheduler ) --------------------- 48
5.2.2 Time Domain 搜尋觀念 ------------------------------ 48
5.2.3 Time stamp位元長度 ( bit length ) ----------------- 50
5.2.4 Time domain分割 ----------------------------------- 50
5.2.5 搜尋技巧:二元搜尋法(Binary Search Algorithm) --- 51
5.2.6 架構實現 ------------------------------------------ 54
第六章、模擬結果 ----------------------------------------- 56
6.1 模擬架構 (Simulation Architecture)---------------- 56
6.2 數值分析(Numerical Results)----------------------- 63
6.2.1 硬體模擬效能分析 ---------------------------------- 71
6.2.2 軟體模擬效能分析 ---------------------------------- 73
6.2.3 硬體與軟體模擬效能比較分析------------------------- 75
6.3 結論及討論(Conclusions and Discussions)----------- 77
第七章、結論 --------------------------------------------- 78
第八章、參考文獻 ----------------------------------------- 79
[1] C. Fulton, S.Q. Li, and A. Lin, “Impact analysis of Packet-level scheduling on an ATM shared-memory switch,” Proc. INFOCOM’98, 1998, pp. 947-954.
[2] I. Widjaja and A.I. Elwalid, “Performance issues in VC-merge capable switches for IP over ATM networks,” Proc. INFOCOM’98, 1998, pp. 372-380.
[3] LinghtStream 1010 Multiservice ATM switch, Cisco System, Inc. http://www.cisco.com.
[4] ISO/IEC Final DIS 15802-3, Information Technology - Telecommunications and information exchange between systems - local and metropolitan are networks - Common specifications -- Part 3: Media Access Control (MAC) Bridges (Incorporating IEEE P802.1P: Traffic Class Expediting and Dynamic Multicast Filtering), May 25,1998.
[5] Bisdikian, C. “A note on the conservation law for queues with batch arrivals,” IEEE Trans., 1993, COM-41, (6), pp. 832-835.
[6] Kleinrock L., “Queueing Systems, Volume II: Computer Applications” (John_Wiley & Sons, Inc., 1976).
[7] “Multi-protocol over ATM(MPOA) ver.1.0, “ATM Forum, working in progress, STR-MPOA-01.00, Apr. 1997.
[8] Hui Zhang “Service disciplines for guaranteed performance service in packet-switching networks” Proceedings of the IEEE 83(10), Oct. 1995.
[9] Parekh, A.K.; Gallager, R.G., “A generalized processor sharing approach to flow control in integrated services networks: the single-node case,” IEEE/ACM Transactions on Networking, Vol. 1 3 , June 1993
[10] Hashmi, A.; Pimplapure, A.; Znati, T., “Comparative analysis of scheduling algorithms for integrated service networks Simulation,” Proceedings. 31st 1998.
[11] Golestani, S.J. “A self-clocked fair queueing scheme for broadband applications” in proc. INFOCOM ''94, Tornto, CA,June , 1994
[12] Parekh, A.K.; Gallager, R.G., “A generalized processor sharing approach to flow control in integrated services networks: the single-node case,” IEEE/ACM Transactions on Networking, Vol. 1 3 , June 1993
[13] K.Nichols et al., “Definition of the Differentiated Service Field (DS Filed) in the IPv4 and IPv6 Headers,” IETF RFC 2474, Dec 1998.
[14] Chin-Tau L, Chi-Yung T, Bo Li, Louis C.-Y. Kwan, Stanley K. —M. Chan, “A/I Net: A Network that Integrates ATM and IP,” IEEE Network, Jan 1999, pp. 48-55.
[15] P. Newman, Tom Lyon and G. Minshall, “Flow Labelled IP: connectionless ATM Under IP.” In Proceedings of INFOCOM’96, San-Francisco, Apr. 1996.
[16] Y. Rekhter, B. Davie, D. katz, E. Rosen, and G. Swallow, “Cisco system’s tag switching architecture overview, “Internet Engineering Task Force, RFC 2105, Feb. 1997.
[17] Y. Katsube, K. Nagami and H. Esaki, “Toshiba’s Router Architecture Extensions for ATM Overview,” RFC 2093, Feb. 1997.
[18] A. Romanow and s. Floyd, “Daynamics of TCP Traffic over ATM networks,” IEEE JSAC, vol 13 no. 4, May 1995, pp. 633-641.
[19] S Keshav, An engineering Approach to Computer Networks, Addison-Wesley, 1997.
[20] A self-clocked fair queueing scheme for broadband applications Golestani, S.J.INFOCOM ''94. Networking for Global Communications., 13th Proceedings IEEE , 1994 , Page(s): 636 -646 vol.2
[21] I. Widjaja and A.I. Elwalid, “Performance issues in VC-merge capable switches for Multiprotocol label Switching ,” Proc. INFOCOM’99, 1999, pp. 1196-1189.
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