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研究生:林世祥
研究生(外文):SHIH-HSIANG, LIN
論文名稱:高效率Class-D音訊放大器設計
論文名稱(外文):High Efficiency Class-D Audio Amplifier Design
指導教授:杜翰艷葉美玲葉美玲引用關係
學位類別:碩士
校院名稱:聖約翰科技大學
系所名稱:電子工程系碩士班
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2009
畢業學年度:97
語文別:中文
論文頁數:83
中文關鍵詞:D類音訊放大器高效率
外文關鍵詞:Class-D Audio AmplifierHigh Efficiency
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隨著電子產品的迅速發展,消費性電子產品都朝輕薄微小及可攜性的方向設計,其中需要音訊放大器的產品種類繁多。針對消費電子產品中主要設計需求有幾項,例如:功率消耗、產品體積及散熱問題,其中最為重要的參數是功率效率。功率效率提高,則不僅能延長D類音訊放大器的電池壽命,而且還能在極低的操作溫度下運作。
本論文採用TSMC提供的0.35um 2P4M CMOS製程來設計主僕式結構的D類音訊功率放大器與滑動模式控制的D類音訊功率放大器。本論文的主僕式架構D類音訊功率放大器設計是採用雙三角波產生器及雙回授電路,以提高效率並降低總諧波失真度。設計的晶片面積為1.575mm×1.575mm,其量測結果為輸入訊號為0.6V時,消耗功率為204mW,效率為89%。第二種滑動模式控制D類音訊功率放大器設計是採用可調模式控制調變技術及全橋式輸出級架構。設計的晶片面積為1.575mm×1.575mm,其模擬結果為輸入訊號為0.6V時,消耗功率為2.13W,效率為90.2%。
For the fast growing of electric products, the consumer electronic products are designed toward the direction of tiny and portable. Audio amplifiers are mass needed in these products. The major demands of the consumer products, for example, are: power dissipation, product volume, and heat radiation. The most important design parameter of these is power efficiency. Increasing the power efficiency, it not only lasts the Class-D amplifier battery lives, but also operates in an extra low operating temperature.
This paper designs Class-D amplifies based on self-tuning master-slave architecture and sliding mode control architecture. They are implemented with TSMC 0.35um 2P4M CMOS process. By using double triangle-wave generators and double feedback circuits in self-tuning mater-slave architecture, the efficiency of Class-D amplifier is increased and the total harmonic distortion (THD) is decreased. The chip size is 1.575mm x 1.575mm. The measure results show that when the input voltage is 0.6V, the power dissipation is 204mW, and the power efficiency is 89%. Second, the sliding mode control Class-D amplifier is using the sliding mode control modulation and bridge-configured architecture. The chip size is 1.575mm x 1.575mm. The simulation results show that when the input voltage is 0.6V, the power dissipation is 2.13W, and the power efficiency is 90.2%.
第一章 緒論
1.1研究背景與動機….………………………………………………………………………..1
1.2 論文組織…………………………………………………………………………………..3

第二章 D類音訊功率放大器介紹
2.1前言………….……………………………………………………………………………..4
2.2 D類音訊功率放大器的種類…….………………………………………………………..5
2.2.1脈衝寬度調變(PWM)技術……………………………………………………...5
2.2.2 Delta-Sigma調變( :DSM)技術…………………………………………...6
2.2.3起停控制調變(Bang-Bang Control:BCM)技術………………………………...8
2.2.4滑動模式控制調變(Sliding Mode Control:SMC)技術…………………………...8
2.3 D類音訊功率放大器之參數……...………………………………………………………9
2.3.1功率效率(Power Efficiency)…………………………………………………….9
2.3.2總諧波失真度(Total Harmonic Distortion:THD)………………………………11
2.3.3線性度(Linearity)……………….……………………………………………...12
2.3.4輸出級輸出阻抗…………………...…………………………………….………..13
2.4 D類音訊功率放大器的工作原理……..………………………………………………...13

第三章 主僕式D類音訊功率放大器設計
3.1 前言………………………………………………………………………………………15
3.2 主僕式脈衝寬度調變電路………………………………………………………………15
3.3 主區塊(Master)電路……………………………………………………………………17
3.4 僕區塊(Slave)電路……………………………………………………………………18
3.4.1 三角波產生器…………………………………………………………………….19
3.4.2 雙回授電路……………………………………………………………………….20
3.4.3 反相器比較器…………………………………………………………………….21
3.5後級驅動電路與功率電晶體(Power MOS)……………………………………………22
3.6橋式輸出級(Bridge-configured)電路…………………………………………………22
3.7輸出級濾波器電路………………………….……………………………………………24
3.8 H-SPICE模擬結果………………………….……………………………………………26
3.9佈局設計…..……………………….……………………………………..………………38
3.10主僕式D類音訊功率放大器之量測……………………………..……………………41

第四章 滑動模式控制D類音訊功率放大器設計
4.1前言……………………………………………………………………………………….48
4.2滑動模式控制D類音訊功率放大器電路………………………………………………49
4.2.1 電流鏡偏壓……………………………………………………………………….50
4.3積分器電路…………………………………………….…………………………………53
4.4磁滯比較器電路………………………………………………………………………….54
4.5 H-SPICE模擬結果……….………………………………………………………………56
4.6佈局設計………………….………………………………………………………………68
4.7滑動模式控制D類音訊功率放大器之量測……………………………………………71


第五章 結論
5.1 結論………………………………………………………………………………………76
5.2 未來發展方向……………………………………………………………………………78

參考文獻……………………………………………………………………………………...79
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