臺灣博碩士論文加值系統

在本論文中，我們提出了以金氧半場效電晶體平方律來實現電流式對數領域濾波器的設計。針對所提出不同型式的電流式對數領域濾波器，我們提出一個方法來使得濾波器中所有外加電流源具有相同的操作範圍。並利用MATLAB軟體進行做線性迴歸分析。當給定濾波器的極點頻率時，根據線性迴歸分析，可以找出電流源所需要的電流值，進而完成電流式濾波器的設計。我們模擬了一階低通、二階低通、二階帶通、雙二次濾波器，然後利用這些低階濾波器來合成高階濾波器。模擬結果顯示所提出的電路可在較高頻操作(一階低通濾波器的極點頻率最高達到5.2MHz)，並具有可調整性以及模組化設計的優點。
我們採用 UMC 2P2M 0.5µm 製程技術來實現了本篇論文中所提出的電流式對數領域濾波器設計。整個晶片整合了六個電流式平方根電路模組、三個接地電容模組以及兩個疊接式N型電流鏡模組，連接這些電路模組可以得到所提出的各種濾波器，此晶片最多可以實現一個三階低通濾波器。

In this thesis, we implement current-mode log-domain filters by applying MOSFET square law. With respect to different type of filters, we propose an approach to maintain the same operating range of the external current sources. We utilize MATLAB to perform the linear regression analysis of the simulation results. By applying the linear regressive equations, we can calculate the necessary currents and then substitute these currents into the filter to complete our design. We simulate first-order lowpass, second-order lowpass, second-order bandpass, and biquad filters. By connecting these low-order filters, we can compose a high-order filter. The simulation results show that the proposed circuits have the advantages of higher frequency operation (the maximum pole frequency of the first-order lowpass filter can achieve 5.2MHz), tuneablilty and modular design.
In this thesis, we implement the proposed current-mode log-domain filters by UMC 2P2M 0.5µm process. The chip integrates six current-mode square root circuit modules, three grounded capacitor modules, and two cascode NMOS current mirror modules. The proposed filters can be implemented by connecting these modules. This chip can be utilized to implement a third-order lowpass filter.

目 錄
頁數
第一章 緒論………………………………………..……………………1
1.1 背景說明…………………………………………………..1
1.2 研究動機………………………………………..…………4
1.3 論文組織…………………………………………………..5
第二章 電流式對數領域濾波器推導…………………………………..6
2.1 狀態空間方法……………………………..………………6
2.2 轉換轉移函數至狀態空間表示式…..……………………8
2.2.1 一階濾波器轉換…...………………………………8
2.2.2 二階濾波器轉換……..……….……………………9
2.2.3 高階濾波器轉換..………….……………..………14
2.3 電流式對數領域濾波器之設計推演……………………14
2.3.1 一階低通濾波器…………….………………...….14
2.3.2二階低通濾波器…………….………………...…..16
2.3.3 二階帶通濾波器……………………………….…18
2.3.4 雙二次濾波器…………………………………….20
2.4 對數領域濾波器之設計流程..……………..……………22
2.5 基本電路架構: 電流式平方根電路…………………….23
2.6 濾波器的電路架構圖…………………………...……….26
2.6.1 一階低通濾波器電路架構…………...…………..27
2.6.2 二階低通濾波器電路架構……………………….27
2.6.3 二階帶通濾波器電路架構……………………….28
2.6.4 雙二次濾波器電路架構………………………….29
第三章 電流式對數領域低通濾波器模擬驗證………………………31
3.1 電流式平方根電路操作…………………………………32
3.2 電流式平方根電路模組…………………………………34
3.3 一階低通濾波器驗證……………………………………37
3.3.1 疊接式N型電流鏡的影響………………………37
3.3.2 直流電壓準位的考量…………………………….38
3.3.3 一階低通濾波器驗證…………………………….39
3.3.4 寬頻帶一階低通濾波器重新設計……………….41
3.4 二階低通濾波器驗證……………………………………46
3.5 雙二次濾波器低通響應驗證……………………………56
3.6 高階低通濾波器驗證……………………………………63
第四章 電流式對數領域帶通濾波器模擬驗證………………………68
4.1 二階帶通濾波器驗證……………………………………69
4.2 雙二次濾波器的帶通應用………………………………77
4.3 高階帶通濾波器…………………………………………82
第五章 電流式對數領域濾波器硬體實現……………………………85
5.1 電路佈局圖………………………………………………85
5.2一階低通濾波器………………………………………….87
5.3 二階低通濾波器…………………………………………91
5.4 二階帶通濾波器…………………………………………94
5.5 雙二次濾波器……………………………………………98
5.6 三階低通濾波器……………………………………..…106
5.7 總結…………………………………………………..…109
第六章 結論……………………………………..……………………111
參考文獻……………………………………………………………....113

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