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研究生:陳偉智
研究生(外文):Chen,Wei Chih
論文名稱:單電感雙輸出降升壓型轉換器之分析與設計
論文名稱(外文):Design of A High Efficiency Buck-Boost Multiple Output Converter
指導教授:劉萬榮
口試委員:黃淑絹洪志儒
口試日期:2012-07-30
學位類別:碩士
校院名稱:國立臺北大學
系所名稱:電機工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2012
畢業學年度:100
語文別:中文
論文頁數:101
中文關鍵詞:順序能量分佈控制雙輸出
外文關鍵詞:dual-outputordered power distribution
相關次數:
  • 被引用被引用:1
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  • 下載下載:57
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手持式電子裝置中,需要同時供應多組不同電壓使其內部電路正常運作,因此需使用多組直流轉換器將電池轉成多組需求電壓。但每組轉換器皆需一個電感,數組電感在裝置中顯的體積龐大且浪費空間。近年來提出僅用一個電感即可提供多組電壓輸出之電路,本論文研究之電源轉換器即出自此新型架構,且本論文所提出架構使用三個功率級電晶體做為開關,並只使用一個補償迴路,採用電壓控制機制,減少功率元件切換所發生的損失,大大減少外部所需之元件,以及讓電路獲得較高的抗雜訊能力,另外在雙輸出的回授控制迴路方面,採用了順序能量分佈控制模式,使電路可在連續導通模式中擁有高效率。
本論文主要針對工作電壓3.6V做為輸入電壓,所提出雙輸出之架構,分別可降壓至1.8V~2.5V以及升壓至4V~4.6V,輸出電壓連波皆控制在20mV之內,操作頻率為500kHz~1MegHz,降壓的最大負載可達150mA,升壓則為100mA,並且配合國家晶片設計中心提供的TSMC-2P4M 0.35um CMOS製程來完成直流-直流單電感雙輸出降壓-升壓型轉換器之晶片,在負載各為50mA時,效率可達94%。

Multiple voltages are often required for powering many hand-held electronic devices. In such applications, multiple DC-DC converters are often used to convert from a battery to proper multiple output voltages. Each converter usually requires one inductor for the power conversion. Therefore, the multiple inductors used for such application are relatively bulky and a waste of space. In recent years, however, a new class of converters has been reported capable of providing multiple outputs using only single inductor. Therefore, This thesis propose a module using just three power switchers and one compensation with Voltage mode control. These can lower down the loss of the switch, decrease the need of the external components, and has better noise immunity. We use ordered power distribution control (OPDC) which works in continuous conduction mode (CCM) with high efficiency.
The DC-DC converter has been implemented in TSMC 0.35-μm 2P4M CMOS process. According to the measurement results, the maximum peak-to-peak output voltage ripple is less than 20mV, and current ranges are between 1mA and 100mA. The DC-DC converter operates in frequency 500 kHz~1MegHz and supplies voltage ranges from 3.6 to 3.8V. The first Buck output voltage can be 1.8V~2.5V and the other Boost output holds 4V~4.6V. The highest efficiency of the circuit can reach up to 94% when the two outputs’ loads are both 50mA.

謝 辭 Ⅱ
中文論文提要 Ⅲ
英文論文提要 Ⅳ
目 錄 Ⅵ
圖目錄 Ⅸ
表目錄 ⅩⅢ

第一章 緒 論 1
1.1 研究背景與動機 1
1.2 論文架構簡介 6

第二章 切換式轉換電路概論(Switching Principle) 7
2.1 切換式轉換電路簡介 7
2.2 直流-直流切換式電容轉換器(Switching Capacitor Converter) 8
2. 3 直流-直流切換式電感轉換器(Switching Inductor Converter) 9
2. 3.1 直流-直流切換式電感降壓型轉換器 12
2.3.2 直流-直流切換式電感升壓型轉換器 13
2.3.3 直流-直流切換式電感升降壓型轉換器 14
2.4 切換式升壓轉換器電壓控制與電流控制分析 16
2.5 單電感多輸出轉換電路簡介 19
2.5.1 隔離型多輸出轉換電路 19
2.5.2非隔離型多輸出轉換電路 21
2.6 互穩壓(Cross Regulation) 23
2.7 分時多工控制(Time Multiplexing Control) 25
2.7.1分時多工控制的操作模式 28
2.8 PCCM工作模式(Pseudo Continuous Conduction Mode) 30
2.8.1 PCCM控制的操作模式 31
2.9 順序能量分布控制模式(Ordered Power Distribution Control)OPDC 34
2.9.1 OPDC控制的操作模式 35

第三章 單電感雙輸出轉換器原理說明與分析 39
3.1 單電感雙輸出轉換器發展 39
3.2 單電感雙輸出降壓-升壓型,升壓-升壓型架構分析 43



第四章 電路設計與模擬 53
4.1 控制器之區塊電路設計 53
4.2 啟動電路與偏壓電路 (Start-up and Biasing circuit) 55
4.3 能隙參考電壓源電路 (Bandgap Reference circuit) 58
4.4 二級式運算放大器 (Two Stage Operational Amplifier circuit) 60
4.5 比較器 (Comparator) 63
4.6 遲滯比較器電路 (Hysteresis Comparator circuit) 64
4.7 鋸齒波與時脈電路 (Sawtooth and Clock circuit) 67
4.8 軟啟動電路 (Soft-start circuit) 68
4.9 零電流偵測電路 (Zero Current Detector circuit) 70
4.10 選擇最高電壓電路 (Selector Max-Voltage circuit) 71
4.11 電壓準位調整電路 (Level-Shift Voltage Circuit) 72
4.12 脈波寬度調變(Pulse Width Modulator)調變電路 73
4.13 邏輯電路(Logic Circuit) 74
4.13.1反或閘(Nor Gate) 74
4.13.2反及閘(Nand Gate) 75
4.13.3 S-R閂鎖器 76
4.14 多工器模式選擇電路(Mux) 77
4.15 控制電路(Control Circuit) 78
4.16 驅動電路(Driver Circuit) 79

第五章 整體系統模擬與晶片佈局 80
5.1 線性穩壓(Line Regulation) 80
5.2 負載穩壓(Load Regulation) 82
5.3 輸出電壓漣波(Output Ripple) 83
54 電感電流與功率級開關切換關係圖 85
5.5 晶片佈局(Layout) 86
5.6 量測考量(Measure Setup) 88
5.7  Post-Simulation 90

第六章 結 論 92
6.1 總結與貢獻(Conclusions) 92
6.2 未來展望(Future Work) 93

參考文獻 94



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