臺灣博碩士論文加值系統

本論文提出了一個具有新式相變化的操作機制與材料，操作原理結合了傳統相變化記憶體的基本特性，以及電子共振穿隧二極體的負微分電阻的特性。而選用的材料則與傳統的相變化材料不同，乃利用電漿輔助型原子層沉積系統成長金屬氧化物(氧化鉿、氧化鋅、氧化鎵)，並堆疊成雙能障量子井的結構。
本論文主要分為兩部分。第一部分為記憶體元件之製作，包含了電漿輔助型原子層沉積系統的原理與操作、沉積材料成長速率之校正、X射線光電子能譜特性分析，以及元件完整的製程。第二部分為記憶體元件之電性量測，包含了相變化特性曲線、轉換臨界功率的比較、寫入(Set)與重置(Reset)的關係及壽命讀寫次數的量測。
我們用電漿輔助型原子層沉積系統沉積了HfO2/ZnO/HfO2 (2/4/2及2/6/2 nm)和Ga2O3/ZnO/HfO2 (4/2/4、4/3/4及4/4/4 nm)兩種結構，並製作四種元件面積，625π、3025π、7225π及11025π平方微米，發現在Ga2O3/ZnO/HfO2為4/2/4且面積為625π〖 μm〗^2時有較佳的特性。其有較小的轉換臨界功率(約為2.6mW)，元件的電阻開關比可達1000倍，抹寫次數可達超過100次。

In this thesis, we demonstrate a new device mechanism and material system for realizing phase change memory (PCM). We combine two device concepts into one single device, i.e., phase change memory and resonant tunneling diode. Metal oxide were used as the phase changing material, unlike the conventional GeSbTe material. Our devices was prepared by the Plasma-Enhanced Atomic Layer Deposition (PEALD) system, with a double-barrier quantum-well structure.
There are two main parts in this thesis. First, we introduce how to make our memory device, including the mechanism and operation of PE-ALD, the calibration of growth rate and X-ray photoelectron spectroscopy analysis of each material, and the whole device fabrication process. Second, we discuss the electrical measurements, including characteristic I-V curves, comparison of threshold powers for phase change, relationship between set and reset conditions, and life-time cycling test.
Oxide stacks of HfO2/ZnO/HfO2 (2/4/2, 2/6/2 nm) and Ga2O3/ZnO/HfO2 (4/2/4, 4/3/4 and 4/4/4 nm) were deposited by PE-ALD, and devices of 625π, 3025π, 7225π and 11025π 〖μm〗^2 were fabricated. We found that Ga2O3/ZnO/HfO2 (4/2/4) device of area 625π 〖μm〗^2 has the best properties for PCM device: lowest threshold power of ~ 2.6 mW, highest resistance on/off ratio of ~ 1000, and more than 100 times operation in life-time cycling test.

Chapter 1 緒論 1
1.1 非揮發性記憶體簡介 1
1.2 相變化記憶體的發展與概況 2
1.3 研究動機與論文概述 7
1.3.1 研究動機 7
1.3.2 論文概述 8
Chapter 2 二極記憶體元件之原理 9
2.1 相變化記憶體的操作原理 9
2.2 共振穿隧式二極體的基本理論 13
Chapter 3 二極記憶體的元件製作 15
3.1 原子層沉積系統 Atomic Layer Deposition 15
3.1.1 ALD技術發展沿革 16
3.1.2 ALD成長機制 17
3.1.3 ALD成長模式概述 20
3.2 PE-ALD機台架構及材料分析 23
3.2.1 機台架構 23
3.2.2 PE-ALD氧化物材料測試與分析 28
3.3 二極記憶體元件製作流程 36
Chapter 4 二極記憶體元件之電性量測 45
4.1 量測系統架構與方法 45
4.1.1 量測系統架構 45
4.1.2 量測方法簡介 46
4.2 二極記憶體元件量測結果 47
4.2.1 電壓-電流特性曲線 49
4.2.2 臨界功率的數據比較 52
4.2.3 負向脈衝電流的寫入與正向脈衝電壓的重置 55
4.2.4 記憶體元件壽命讀寫量測 57
Chapter 5 結論與未來展望 62
參考資料 64

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