臺灣博碩士論文加值系統

近年來科技發展迅速，在通訊系統等應用上都需要高速及高解析度的數位至類比轉換器。為了達到高速操作的目的，本論文使用電流式數位至類比轉換器架構，並考量受到操作電壓以及短通道調變效應的限制，使得設計精準電流源陣列是相當困難的，為此我們利用一種複製-分割的高匹配電流鏡架構，並且透過高精度佈局實現。
此12位元500MHz數位至類比轉換器是由TSMC 0.18μm 1P6M製程實現電路，供應電壓為1.8V，經過模擬驗證顯示INL為 ， DNL介於-0.8～+0.02 LSB，功耗則為29.8mW，佈局面積0.8mm2。

In recent years, communication systems require high speed and resolution Digital-to-Analog Converter. For high speed operation, the work employed a current-steering and differential pair architecture. In circuit part, output impedance is restricted by the low supply voltage and MOS short-channel effect. Therefore, designing an accurate current source array is extremely difficult. The Digital-to-Analog Converter with a highly matching current mirror circuit is proposed in this work. The precision of this current source array can be obtained.
The proposed 500MHz 12-bit DAC is implemented in 0.18μm CMOS 1P6M technology with the supply voltage of 1.8V. The simulation results show the INL is better than and DNL is between -0.8～+0.02 LSB. Power comsumption of this DAC with a sigle 1.8V supply is 29.8mW. The active area is merely 0.8 mm2.

第1章
1-1 研究背景 1
1-2 論文架構 2
第2章
2-1 簡介 3
2-2 理想數位類比轉換器特性 4
2-3 數位類比轉換器之靜態規格參數 5
2-4 數位類比轉換器之動態規格參數 10
2-5 數位類比轉換器之架構 14
2-5-1 電阻串式數位類比轉換器（Resistor-String DAC） 14
2-5-2 二進位權重式數位類比轉換器（Binary Weighted DAC） 15
2-5-3 溫度計碼式電流導向數位類比轉換器 19
2-5-4 分段式電流導向數位類比轉換器 21
第3章
3-1 電流源不匹配分析（Current-Source Mismatch） 23
3-2 MOS元件的不匹配（Mismatch）分析 27
3-3 電流源阻抗分析 28
3-4 電流源輸出節點分析 33
3-5 電流源頻寬設計考量 34
3-6 控制訊號的影響分析 36
3-7 系統誤差（Systematic Error） 37
第4章
4-1 設計流程 39
4-2 架構介紹 40
4-3 去突波栓鎖電路（Deglich &; Latch Circuit） 41
4-4 電流源架構 43
4-5 晶片佈局考量 47
4-6 靜態模擬 50
4-7 動態模擬 59
第5章
5-1 效能比較 60
5-2 結論與未來展望 61
參考文獻 62

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