臺灣博碩士論文加值系統

在本篇論文中完成了適用於IEEE 802.11a之前端發射器設計，本設計採用聯電0.18-μm 1P6M CMOS製程完成晶片製作，並以矽品QFN20完成封裝,。此顆IC的特點有二點，一是工作的頻寬相當寬(5G~6GHz)， 可包含U-NII (5.15G~5.825 GHz)內的所有頻帶。二是所需的外部元件非常少，不再需要balun跟 SAW 濾波器。IC中包含了兩個balun、直接升頻混波器以及三級的前置放大器。模擬的結果可以達到輸出1-dB點為10.5dBm(在5.5GHz)，其旁波抑制為38.7dB，轉換增益為13.8 dB。在實際的封裝量測中，輸出1-dB點為3.8dBm(在5.5GHz)，旁波抑制有34.3dB，轉換增益為10.5 dB。

In this thesis, a direct-conversion transmitter front-end for IEEE 802.11a has been designed and fabricated in UMC 0.18-μm 1P6M CMOS technology and packaged in SPIL QFN20. There are two features in this chip. First, it operates in the 5 to 6 GHz which covers the U-NII frequency band (5.15 to 5.825GHz). Secondly, it reduces the needs for external component. No external baluns and SAW filters are required. The transmitter front-end contains two baluns, an up-conversion mixer and a three-stage pre-amplifier. The simulation achieves an output 1-dB compression of 10.5 dBm at 5.5GHz with 38.7 dB sideband rejection and 13.8 dB conversion gain. The result of measurement exhibits an output 1-dB compression of 3.8 dBm at 5.5GHz with 34.3dB sideband rejection and 10.5dB conversion gain.

中文摘要......................................................................................................................III
Abstract…………………………………………………………………………........IV
誌謝…………………………………………………………………………………...V
Contents……………………………………………………………………………...VI
List of Figures……………………………………………………………………......IX
List of Tables………………………………………………………………………....XI

Chapter 1 Introduction……………….……………………...………………………1
1.1 Motivation 1
1.2 IEEE 802.11a standard 2
Chapter 2 Transmitter Architecture….………………………………………………6
2.1 Superhetrodyne transmitter 6
2.2 Direct-conversion transmitter 7
Chapter 3 Circuit Implementation………………………………………………….10
3.1 Circuit block diagram 10
3.2 Specification 11
3.3 Balun design 14
3.4 Quadrature generation design 16
3.5 Mixer design 19
3.6 Pre-amplifier design
3.6.1 First stage amplifier 27
3.6.2 Second stage amplifier 31
3.6.3 Last stage amplifier 32
3.6.4 Proposed pre-amplifier 34
3.7 Simulation results 35
3.8 Other applications
3.8.1 Dual band (2.4GHz) 39
3.8.2 UWB band (10GHz) 40
Chapter 4 Layout Considerations………………………………………………..…41
4.1 Chip layout considerations 41
4.2 Package and ESD considerations 44
4.3 PCB layout considerations 46
Chapter 5 Measurement…………………………………………………………….49
5.1 Harmonic test
5.1.1 Instrument setup 50
5.1.2 Results 52
5.2 Frequency response test
5.2.1 Instrument setup 53
5.2.2 Results 54
5.3 Output P1-dB test
5.3.1 Instrument setup 55
5.3.2 Results 56
5.4 IIP3/OIP3 test
5.4.1 Instrument setup 56
5.4.2 Results 57
5.5 Transmit spectrum mask test
5.5.1 Instrument setup 58
5.5.2 Results 60
5.6 System test
5.6.1 Instrument setup 61
5.6.2 Results 62
5.7 Summary 63
Chapter 6 Conclusions………………………………………………………………65
Reference……………………………………………………………………………..66

[1] IEEE Standard 802.11a-1999: Wireless LAN MAC and PHY Specifications -- High-speed Physical Layer in the 5GHz Band, New York, IEEE. 2000.
[2] B. Razavi, RF Microelectronics, New Jersey, Prentice-Hall, 1998.
[3] B. Razavi, Design of Analog CMOS Integrated Circuits, International Edition, New York, McGraw-Hill, 2001.
[4] R. Ludwig, P. Bretchko, RF circuit design, New Jersey, Prentice-Hall, 2000.
[5] T. H. Lee, The design of CMOS radio-frequency integrated circuits, New York, 1998
[6] G. D. Vendelin, A.M. Pavio, U. L. Rohde, Microwave circuit design using linear and nonlinear techniques, John Wiley & Sons, 1990
[7] G. Gonzalez, Microwave transistor amplifiers analysis and design, 2nd edition, New Jersey , Prentice-Hall, 1997
[8] Ting-Ping Liu, Eric Westerwick, “5-GHz CMOS radio transceiver front-end chipset”, IEEE J. Solid-State Circuits, vol. 35, pp.1927-1933, Dec.2000
[9] M. A. Margarit, D. Shih, P. J. Sullivan, F. Ortega, ”A 5-GHz BiCMOS RFIC front-end for IEEE802.11a/HiperLAN wireless LAN”, IEEE J. Solid-State Circuits, vol. 38, pp. 1284-1287, Jul. 2003
[10] M. Zargari, B. A. Wooley, et. al. “A 5-GHz CMOS transceiver for IEEE 802.11a wireless LAN systems,” IEEE J. Solid-State Circuits, vol. 37, pp. 1688-1694, Dec. 2002.
[11] Pengfei Zhang, Thai Nguyen, Chris Lam, Doug Gambetta, et. al. “A direct conversion CMOS transceiver for IEEE 802.11a WLANs”, ISSCC 2003, paper 20.3, 2003
[12] A. R. Behzad, Z. M. Shi, S. B. Anand, Li Lin, K.h A. Carter, et. al. ”A 5GHz direct-conversion CMOS transceiver utilizing automatic frequency control for the IEEE 802.11a wireless LAN standard”, IEEE J. Solid-State Circuits, vol. 38, pp.2209-2220, Dec. 2003
[13] Eunseok Song, Soo-Ik Chae, Wonchan Kim, “A 2GHz CMOS down-converter with robust image rejection performance against the process variations”, Journal of the Korean Physical Society, Vol.35, pp. s918-926, Dec. 1999
[14] Glenn Watanabe, Henry Lau, Juergen Schoepf, “Integrated Mixer design”, Motorola Inc.
[15] Po-Niang Lin, “5GHz CMOS transmitter front-end for IEEE 802.11a”, M.S. Thesis, National Chiao-Tung University, 2003