臺灣博碩士論文加值系統

本論文利用感應耦合型電漿化學氣相沉積和奈秒綠光雷射尖峰退火技術，使之沉積奈晶鍺薄膜結晶成晶粒具500nm多晶鍺薄膜。利用化學機械研磨使雷射結晶後粗糙的表面磨平降低漏電流，使用感應耦合型電漿和原子層沉積系統可以使多晶鍺氧化出緻密的二氧化鍺薄膜並堆疊高介電質材料，遠紅外光雷射退火技術使源/汲極有效活化並形成超淺層接面，利用以上技術我們成功製造7奈米空乏模式多晶鍺電晶體元件，其PMOS載子遷移率可高達98 cm2/V-s、次臨界擺幅可低於0.235 V/Decade以及On/Off電流比可超過105；使用反向參雜並以遠紅外光雷射退火技術將P型半導體多晶鍺薄膜反轉成N型薄膜，此元件特性之次臨界擺幅可低於0.35 V/Decade以及On/Off電流比可超過103。同時利用化學機械研磨可將其表面平均粗糙度由52 Å降低為5Å，可獲得具超薄(25nm)平坦化之反轉模式多晶鍺電晶體的薄通道。此外，以遠紅外光雷射退火技術可將離子佈植之多晶鍺薄膜做退火，其電阻率小於50 mΩ-cm。結合此低熱預算技術及金屬閘極結構，已成功開發出具有高效能NMOS反轉模式多晶鍺電晶體，其次臨界擺幅可低於0.14 V/Decade以及On/Off電流比接近104。另一方面，在低熱預算及高元件性能之基礎下，導入具氧化層/氮化矽/氧化層/氧化層之金屬閘極非揮發性電荷捕捉記憶體，可於12V操作電壓下，快速進行(1ms)進行寫入及抹除，其記憶窗口分別為1.9V。因此具低熱預算之金屬閘極薄膜電晶體及非揮發性記憶體皆相當適合應用未來3D-ICs之垂直整合。

In this thesis, the green nanosecond spike laser crystallization (GNS-LC) was employed on nanocrystalline germanium film that was deposited by inductively-coupled plasma chemical vapor deposition system (ICPCVD) to recrystallize the poly-Ge film with large grain (500 nm). Chemical mechanical polishing (CMP) was applied on flat channel surface to reduce leakage current. ICPCVD was used to oxidation germanium surface and atom layer deposited system deposited high-K material. We also used counter doped and far-infrared laser annealing to reverse the N-type germanium film. After recrystallization, we have fabricated a high performance of depletion mode poly-Ge PMOS and NMOS field effect transistor. The PMOS FET exhibits high hole mobility of 98 cm2/V-s, low subthreshold swing of 0.235 V/Decade, and high on/off ratio of 105; The NMOS exhibits subthreshold swing of 0.35 V/Decade, and high on/off ratio of 103. Moreover, CMP was used to planarize and thin poly-Ge channel that reduces the mean roughness from 52 Å to 5 Å and achieve channel thickness to 25 nm. In addition, the GNS-LC reduces the resistivity to 0.05 mΩ-cm. Combining the thermal budget technologies and metal gate, We have fabricated a high performance of inversion mode poly-Ge FET that exhibits low subthreshold swing of 0.144 V/Decade, and high on/off ratio of 104. On the basis of low thermal budget technologies and high performance transistor, we introduce a multi-layer of oxide/HighK/nitride/oxide as nonvolatile memory. The MONAOS NVM exhibits a fast program/erase speed of 1 ms under 12V and the memory window is 1.9V. Therefore, the FET and NVMs with metal-gate fabricated by low thermal budget technologies are promising devices for the hetero-integration in 3D-ICs application.

摘要 I
Abstract III
致謝 V
目 錄 VII
圖目錄 X
表目錄 XIII
1. 第一章 導 論 1
1.1 前言 1
1.2 低溫技術之發展 1
1.3 鍺電晶體 4
1.4 鍺電晶體面臨的挑戰 5
1.5 研究動機 5
2. 第二章 原理介紹 7
2.1 多晶鍺薄膜製作 7
2.1.1 固相結晶 (Solid-phase crystallization，SPC) 8
2.1.2 金屬誘發結晶 (Metal-induced crystallization，MIC) 10
2.1.3 閃光燈誘發結晶(Flash lamp induced crystallization，FLIC) 12
2.1.4 雷射退火結晶 (Laser annealing crystallization) 14
2.2 汲/源極退火方法 16
2.2.1 快速熱退火 (Rapid thermal annealing，RTA) 16
2.2.2 微波退火 (Microwave annealing) 17
2.2.3 閃光燈退火 (Flash lamp annealing) 17
2.2.4 遠紅外光雷射退火 (Far-infrared laser annealing) 19
2.3 去費米能階釘札(Fermi level depinning) 21
2.3.1 介電層 22
2.3.2 鍺化鎳 23
2.4 反轉模式電晶體操作原理 24
2.5 空乏模式電晶體操作原理 26
3. 第三章 實驗儀器與元件製作 32
3.1 實驗儀器介紹 32
3.1.1 感應耦合型電漿化學氣相沉積系統 32
3.1.2 奈秒綠光尖峰雷射退火掃描系統 36
3.1.3 化學機械研磨 37
3.1.4 原子層沉積系統 39
3.1.5 遠紅外光雷射退火系統(FIR- LA) 40
3.2 雷射結晶多晶鍺場效電晶體 43
3.2.1 空乏模式多晶鍺電晶體 44
3.2.2 反轉模式多晶鍺電晶體 47
4. 第四章 實驗結果與分析 51
4.1 以雷射結晶製作多晶鍺薄膜 51
4.1.1 不同雷射瓦數對多晶鍺晶粒大小影響 53
4.1.2 不同雷射瓦數對多晶鍺薄膜品質之影響 54
4.1.3 薄通道之雷射結晶薄膜 57
4.2 空乏式多晶鍺場效電晶體 59
4.2.1 I-V 電性分析 59
4.2.2 不同通道寬度之雷射結晶多晶鍺空乏式電晶體 61
4.2.3 空乏式多晶鍺電晶體之載子遷移率 62
4.2.4 以反向摻雜製作空乏式多晶鍺電晶體 64
4.3 空乏式多晶鍺非揮發性電荷捕捉記憶體 65
4.3.1 多晶鍺記憶體之寫入抹除特性 65
4.3.2 多晶鍺記憶體電荷保存力 67
4.4 雷射結晶多晶鍺反轉式薄膜電晶體 67
4.4.1 調變同步摻雜流量之薄膜影響 67
4.4.2 多晶鍺/氧化鍺介面缺陷 69
4.4.3 雷射退火阻抗變化 70
4.4.4 I-V 電性分析 71
4.5 鍺化鎳 73
5. 第五章 結 論 75
5.1 結論 75
5.2 未來方向 76
Reference 77

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