臺灣博碩士論文加值系統

在半導體製程技術日益精進的時代，驅使小型化自主性低功耗裝置 (如被動式 RFID tag 與 wireless sensor node)利用其內部電源管理控制電路以提升裝置本身的省電和能源使用效率。使得利用機械振動、熱度、太陽能和電磁能等能量轉換的能量採集電路(Energy Harvesting Circuit)搭配儲能裝置以供給電源給低供耗裝置的可行性大為提升。提高此類能量採集電路的轉換效率(Conversion Efficiency)與方便性是使其為人們接受與否的重要因素。
近年來由於無線通訊裝置(如手持移動電話和無線網路路由器)的蓬勃發展，空氣中充滿了各種頻段的高頻信號，這些無線射頻(RF)電磁波不失為一種絕佳的能量來源，用以做為能量採集器(energy harvester)的輸入能量。一般傳統無線射頻能量採集器(RF energy harvester)，為提升輸出對輸入的功率轉換效率，會在天線與整流電路之間加入高品質因素(quality factor)的電感器(inductor)與電容器(capacitor)所組成的阻抗匹配電路[1-3][5][11-13][17]，導致直流(DC)輸出電壓對輸入射頻(RF)信號的操作頻寬變窄。為使無線射頻能量採集電路(RF energy harvester)達到寬頻帶(Wideband)操作且獲得較高的電壓(或電流)增益，本論文設計一個利用變壓器做為共振器耦合(resonator coupling)阻抗匹配電路的遠場無線射頻能量採集器(far-field RF energy harvester)。操作中心頻率為2450 MHz，電路的3dB操作頻寬達到850 MHz。在輸出電壓/電流達到1V/2uA條件時的輸入信號靈敏度(sensitivity)為-14 dBm。當輸入信號功率在-7 dBm下的功率轉換效率(power conversion efficiency)為10.2%。本論文中實現的晶片是使用TSMC 0.18um CMOS 1P6M製程。晶片面積為 832 x 735 um2 。

The technology of semiconductor process is getting to forge ahead vigorously, which enables the miniature autonomy devices designed with low power consumption (for example, passive RFID tag or wireless sensor node) after utilizing their internal power management circuit, so as to upgrade their efficiency in power-saving and energy use. The potentials to use energy harvesting circuit for energy conversion by way of mechanical vibration, heat, solar energy, and radio energy, into power storage equipment giving power supply for low power consumption devices are becoming popular. Increasing the conversion efficiency of Energy Harvesting circuit is the most important factor in acceptance.
Recently wireless communication gadgets (such as hand-held mobile phone and wireless LAN router) are booming in popularity, various radio signals scatter in air, so that these RF electromagnetic waves are kind of excellent energy resources as an input energy of the RF energy harvester. In general, to improve RF harvester’s power transfer efficiency, the traditional RF energy harvester will add an impedance matching circuit between antenna and voltage rectifier, which consists of inductor and capacitor with high quality factor (Q value), [1-3][5][11-13][17], as a result, its input operation bandwidth becomes narrow.
In this thesis, we design a far-field RF energy harvester including an on-chip transformer between antenna and voltage rectifier as resonator coupling impedance matching circuit to gain wider operation bandwidth and larger voltage (or current) gain. The operation center frequency of this work is 2450 MHz and its operation 3dB bandwidth is 850 MHz, and its sensitivity is -14dBm under test condition while output DC voltage 1V and current 2uA. The power conversion efficiency is 10.2% while RF input power is -7dBm. The chip is implemented in TSMC 0.18 um 1P6M CMOS process, and its size is 832 x 735 um2.

摘要　　　　　　 (ABSTRACT) i
ABSTRACT iii
誌謝　　　　　　 (Acknowledgement) v
TABLE CAPTIONS viii
FIGURE CAPTIONS ix
Chapter1 Introduction 1
1.1 Motivation 1
1.2 Thesis Organization 2
Chapter 2 Background information of low power RFID system 3
2.1 RFID introductions 3
2.2 Block diagram of passive RFID tag 7
2.3 Passive RFID operation 8
2.3.1 Reader-to-Tag communication 8
2.3.2 Tag-to-Reader communication 9
Chapter 3 On-chip transformer 10
3.1 Ideal transformer 10
3.2 Non-ideal transformer 13
3.3 Basic on-chip transformer structures 16
3.3.1 Planar on-chip transformer 16
3.3.2 Stacked transformer 19
3.4 On-chip transformer design and simulation 20
3.4.1 On-chip transformer design procedures 21
Chapter 4 RF Energy Harvester 29
4.1 RF energy harvester structure 29
4.2 Matching circuit 30
4.2.1 Impedance matching network implemented by inductor (L) and capacitor (C) 30
4.2.2 Transformer as a resonator coupling impedance matching circuit 34
4.3 RF-DC converter 36
4.3.1 Single stage voltage doubler (rectifier) 36
4.3.2 N-stage Voltage doubler (rectifier) 38
4.3.3 Native and normal MOSFETs 39
4.4 Simulation and Design of an RF energy harvester with trans- former as resonator coupling impedance matching circuit 47
4.4.1 Design specifications 47
4.4.2 Simulation and design of an RF harvester with stacked 13- stage voltage doubler and an on chip step-up transformer 47
4.4.2.1 Design procedures 48
4.4.3 Experiment setups and measurement results 54
4.4.3.1 Experiment setups 54
4.4.3.2 Measurement results 58
4.4.3.2.1 S11, input return loss 58
4.4.3.2.2 VDC OUT VS. Frequency response 61
4.4.3.2.3 VDC OUT VS. Input power ,Pin (dBm) 62
4.4.3.2.4 Sensitivity 63
Chapter 5 Conclusions 65
REFERENCE 67

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