臺灣博碩士論文加值系統

本論文以Σ－Δ為調變基礎來設計D類音頻放大器。D類放大器不是使用電晶體的線性工作區，而是將其當作開關來放大，有效率高、設計較易的優勢。D類放大器前級需要一個調變器將任意訊號調變成切換式開關訊號以供輸入，而相較於常用的Pulse-Width Modulator，Σ－Δ調變器沒有固定的諧波干擾，且擁有較低的切換次數。在Σ－Δ調變器產生切換式訊號的量化過程中，會有量化誤差的問題，所以本論文以一理想之Noise Shaping量化演算法為推導基礎，分析在無限大的取樣頻率下，其量化誤差如何藉由回授機制、迴圈轉移函數來改變其能量分佈，由其衍生出有限取樣頻率之數位Σ－Δ調變理論與其穩定性分析，並得到最佳的訊號雜訊比。本論文將於FPGA實現穩定的數位式Sigma-Delta Modulator DAC，並配合USB六聲道音頻控制器與全橋功率放大器，完成一5.1聲道D類音頻放大器。

This thesis designs a Class D audio amplifier based on Sigma-Delta Modulator. Instead of working in saturation mode, the transistors of Class D amplifiers operate in the triode and cut-off modes, which is more efficient in terms of energy conversion and has lower cost. Modulators that modulate any signal to a binary signal are needed for Class D amplifiers. However, compared with traditional Pulse-Width Modulator, Sigma-Delta Modulator produces less harmonic distortion and needs fewer number of switching. The quantization scheme in Sigma-Delta Modulator has the impact of quantization errors. Considering a time-optimal quantization algorithm, the in-band quantization errors can be completely eliminated by designing the loop filter running at infinitely high sampling frequency. In this thesis, a Sigma-Delta Modulator is analyzed by modeling a Sigma-Delta Modulator as an approximation of a time-optimal quantizer and its stability criterion is derived. Moreover, a USB based 5.1 channel Class D amplifier which contains a stable digital Sigma-Delta Modulator DAC with FPGA, a six channel USB audio controller, and a switching power stage is also implemented in this thesis.

摘 要 i
ABSTRACT ii
誌 謝 iii
目 錄 iv
表 列 vi
圖 列 vii
第一章 緒論 1
1.1 研究動機 1
1.2 研究內容與目標 4
1.3 論文貢獻 5
1.4 章節概要 6
第二章 D類放大器前級調變理論 7
2.1 PULSE-WIDTH MODULATION (PWM) 7
2.2 MULTI-STEP OPTIMAL CONVERTER (MSOC) 10
2.2.1 區間二次倒回(Receding Horizon Quadratic)最佳化控制 10
2.2.2 MSOC系統架構 11
2.3 SIGMA-DELTA MODULATION (SDM) 14
2.3.1 SDM之發展由來 14
2.3.2 SDM之概念與效果 17
2.4 各方法分析與比較 18
第三章 SDM調變原理與設計 19
3.1 SDM調變器的順滑模態與最佳模態理論 19
3.1.1 具時間最佳化之Noise Shaping量化機制 20
3.1.2 1階數位化量化器 21
3.1.3 n階數位化量化器與系統化簡 23
3.1.4 SDM之穩定條件 25
3.2 數位Σ－Δ調變器NOISE-SHAPING與狀態變數限制 27
3.2.1 從輸出觀點來看n階Noise Shaping效果 27
3.2.2 系統各階狀態表示式與穩態 28
3.3 設計方法 30
3.3.1 迴路濾波器(Loop Filter)設計 30
3.3.2 最佳化雜訊轉移函數(Noise Transfer Function)零點位置 31
3.3.3 n階SDM系統之設計流程 32
第四章 SDM設計實例分析與模擬 33
4.1 1.5-BIT量化機制 33
4.1.1 1.5-bit量化概念 33
4.1.2 1.5-bit量化運算 35
4.1.3 SDM的1.5-bit量化運算 36
4.2 1.5-BIT三元(TERNARY)轉四元(QUATERNARY)切換機制 37
4.3 效能量測標準 42
4.4 系統階數的選擇 43
4.4.1 階數與效能 43
4.4.2 階數與振幅大小 45
4.5 高通NOISE SHAPING截止頻率的選擇 47
4.5.1 截止頻率與振幅大小 48
4.5.2 截止頻率與效能 48
4.6 四階數位SIGMA-DELTA MODULATOR設計模擬 49
第五章 5.1聲道音頻放大器硬體架構與實現 53
5.1 USB1.1 5.1聲道音效控制器 54
5.1.1 硬體介紹：SONIX SN11116 55
5.1.2 I2S (Inter-IC Sound)介面 56
5.1.3 支援5.1聲道之應用軟體：Sonix Sound Station 58
5.2 FPGA核心實現 59
5.2.1 硬體介紹：Altera FLEX10K Emulation Board 59
5.2.2 軟體介紹：MAX plusII 60
5.2.3 FPGA實作 61
5.3 功率放大級 66
5.3.1 硬體介紹：(1)TI TAS5121；(2) TOREX P/N Power MOS 66
5.3.2 功率放大級實作 68
第六章 效能量測與比較 71
6.1 訊號效能量測 71
6.1.1 調變級邏輯量測與效能計算 71
6.1.2 放大級三元與四元切換電壓量測比較 73
6.2 放大級效率 76
6.2.1 TI TAS5121輸出輸入功率 76
6.2.2 TOREX P/NMOS H-Bridge輸出輸入功率 78
第七章 結論 82
7.1 研究成果 82
7.2 未來展望 83
參考文獻 84

[1] 鄭群星, 音響工程, 全華科技圖書股份有限公司, pp. 223-231, 台北, 1993.
[2] F. H. Raab, “Analysis of Idealized Class-D Power Amplifiers,” Green Mountain Radio Research Company Continuing Education Seminar, Vermont, 1982.
[3] H. Bresch, M. Strcitenberger and W. Mathis, “About The Demodulation Of PWM-Signals With Applications To Audio Amplifiers,” Proc. Int. Conf. Circuits and Systems, vol.1, 31, pp.205–208, May-3 June 1998.
[4] H. Nakagaki, N. Amada, S. Inouc, “A High Efficiency Audio Amplifier,” J.Audio Eng. Soc., Vol. 31, No. 6, pp. 984-993, June 1983.
[5] M. Bloechl, M. Bataineh, and D. Harrell “Class D Switching Power Amplifiers: Theory, Design, and Performance” SoutheastCon, 2004. Proceedings. IEEE pp.26-29 Mar 2004 pp.123-146.
[6] S. H. Yu, and J. S. Hu, “Optimization and Control Aspects of Single-Bit Noise-Shaping Quantization”, IEEE Transactions on Circuits and Systems-I, 2004.
[7] S. H. Yu, and J. S. Hu, “Sigma-Delta modulators operated in optimization mode,” IEEE International Symposium on Circuits and Systems, May 2004.
[8] 葉順智，「具備USB介面之雙聲道全數位式音頻放大器設計」，國立交通大學，碩士論文，民國93年。
[9] 陳鏗元，「採用Σ－Δ調變之全橋功率放大器」，國立交通大學，碩士論文，民國94年。
[10] C. Pascual, Z. Song, P. T. Krein, D. V. Sarwate, P. Midya, W. J. Roeckner, “High-Fidelity PWM Inverter for Digital Audio Amplification: Spectral Analysis, Real-Time DSP Implementation, and Results,” IEEE Transactions on Power Electronics,vol.18.
[11] M. T. Tan, H. C. Chua, B. H. Gwee and J. S. Chang, “An Investigation on the parameters Affecting Total Harmonic Distortion in Class D Amplifiers,” ISCAS 2000-IEEE International Symposium on Circuits and Systems, May 28-31, 2000, Beneva, Switzerland.
[12] B. H. Gwee, J. S. Chang, V. Adrian, and H. Amir, “A Novel Sampling Process and Pulse Generator for a Low Distortion Digital Pulse-Width Modulator for Digital Class D Amplifiers,” Proc. Int. Conf. Circuits and Systems, vol.4, pp.25-28, May 2003.
[13] K. P. Sozariski, R. Strzelecki, and Z. Fedyczak, “Digital Control Circuit for Class-D Audio Power Amplifier,” Power Electronics Specialists Conference, PESC. 2001 IEEE 32nd Annual, vol. 2, pp.17-21, June 2001.
[14] P. Caldeira, R. Liu, D. Dalal, and W.J. Gu, “Comparison of EMI performance of PWM and resonant power converters,” IEEE Power Electronics Specialists Conference 1993, pp.134-140, June 1993.
[15] TI “PurePath DigitalTM AUDIO SIX-CHANNEL PWM PROCESSOR.”
[Online]. Available: http://focus.ti.com/lit/ds/symlink/tas5086.pdf
[16] D. E. Quevedo, J. A. De Dona, and G. C. Goodwin, “Receding Horizon Linear Quadratic Control With Finite Input Constraint,” IFAC 15th Triennial World Congress, Barcelona, Spain, 2002.
[17] D. E. Quevedo and G. C. Goodwin, “Multi-Step Optimal Analog-to-Digital Conversion,” Circuits and Systems I: Regular Papers, IEEE, vol. 52, pp.503-505, March 2005.
[18] F. de Jager, “Delta modulation – a method of PCM transmission using the one unit code,” Philips Res. Repts., vol. 7, pp.442-466, 1952.
[19] H. Inose and Y. Yasuda, “A unity bit coding method by negative feedback,” Proceeding
of the IEEE, pp. 1524-1535, November 1963.
[20] 黃克強，「淺談Delta-Sigma之工作原理」。
[21] Quevedo, D.E., and G. C. Goodwin, “Audio quantization from a receding horizon control perspective,” American Control Conference, Proceedings of the 2003, vol. 5, pp.4131-4136, pp.4-6, June, 2003.
[22] M. Corsi, W. T. F. Chen, R. C. Jones, et al., “Concept and Method to Enable Filterless, Efficient Operation of Class-D Amplifiers,” Texas Instruments Incorporated, United States Patent, No.US6,262,632 B1, Jul.17, 2001
[23] APOGEE “DDX Technology”
[Online] Available:http://www.metatech.com.hk/appnote/apogee/pdf/techbackground2.pdf
[24] 余祥華、胡竹生，「D類放大器(Class-D)之控制電路」，中華民國發明專利，案號：092132262，民國九十三年。
[25] N. H.E. Weste, K. Eshraghian, Principles of CMOS VLSI Design, A System Perspective, pp56、210, Second Edition, Addision Wesley, United States of America, 1993
[26] W. C. Hsu, “Switching Amplifier Incorporating Return-To-Zero Quaternary Power Switch,” Waytech Investment Co., Ltd., United States Patent, No.US6,472,933 B2, Oct.29, 2002
[27] “Testing DDX ®Digital Amplifier” Apogee Technology
[Online]. Available: http://www.metatech.com.hk/appnote/apogee/pdf/TestingNote.pdf
[28] R. Schreier, “An empirical study of high-order single-bit delta-sigma modulators,” IEEE Trans. Circuits and Systems-II, vol. 40, no. 8, pp. 461-466, 1992.
[29] “SN11116 USB Six Channel Audio Controller,” Sonix Technology, 2004
[Online]. Available: http://www.sonix.com.tw/sonix/product.do?p=SN11116
[30] “I2S Bus Specification,” Philips Semiconductors
[31] “Digital Amplifier Power Stage,” Texas Instruments, (2003,November).
[Online]. Available: http://focus.ti.com/lit/ds/symlink/tas5121.pdf
[32] “XP152A12C0MR Power MOS FET,” Torex, JTR1121-001
[Online]. Available:http://www.torex.co.jp/english/product/product_7.html
[33] “XP151A13A0MR Power MOS FET,” Torex, JTR1119-001
[Online]. Available:http://www.torex.co.jp/english/product/product_7.html
[34] 林傳生, 使用VHDL電路設計語言之數位電路設計, 儒林圖書有限公司, 新竹, 1998.
[35] 郭長佑, 「掌握D類音效功率放大器(Class D Audio Power Amplifier)音質與用電的新妥協方案,」 DigiTimes.com, 2005/06/20.
[36] 林岑思，「使用有限區間二次倒回最佳化控制之全橋式D類放大器」，國立交通大學，碩士論文，民國94年。