臺灣博碩士論文加值系統

本篇論文將提出應用於穿戴式或植入式生醫感測系統之可編程化濾波器以及單通道之類比前端感測電路，並且本論文更使用懸浮閘電晶體的技術作為類比記憶體，此技術將可以使電路可編程重組化。
本論文首先提出一應用於植入式人工耳蝸之可編程化微型低功耗懸浮閘電晶體電容濾波器。此懸浮閘電晶體電容濾波器提供了低通及高通輸出點至下一級電路，而且所有的濾波器的參數皆可以可編程重組化，包括增益、自然頻率、品質因數，輸入及輸出的直流準位。此濾波器擁有絕佳的模組化特性，可以輕易地將多數個二階濾波器串接並合成高階響應來達到有效利用面積及功率消耗。每一級的懸浮閘電晶體電容二階濾波器所消耗的面積為0.0313mm^2，而量測結果顯示濾波器操作在供應電壓1.8伏特能達到10KHz的頻寬，並且擁有45.5dB的動態範圍及功率消耗為118.4n瓦特。
次要將提出一個應用於生理訊號之可編程化低功耗類比前端電路。此架構整合了低雜訊放大器、可變增益放大器及轉導電容濾波器，並組成單通道的類比感測前端電路。此類比前端電路以0.35μm CMOS製程實現並且所佔的面積為0.62mm^2。本架構利用懸浮閘電晶體來達到可重組化的特性，並且依據眼電圖(EOG)、心電圖(ECG)及肌電圖(EMG)的訊號特徵作編程，所得到的總電流消耗分別為0.13μA、0.22μA及0.84μA，並且量測的輸入參考雜訊分別為2.67μVrms、3.25μVrms及3.8μVrms，並且所量測到的雜訊效率因數 (NEF) 分別為3.72, 3.73及4.26。

This thesis presents a novel fully reconfigurable low-power filter and an integrated reconfigurable analog front-end channel suitable for wearable or implantable biomedical and sensor applications. Floating-gate transistors are employed as analog memories that can be reconfigured to change circuit characteristics.

The proposed reconfigurable filter consists a cascade of floating-gate transistor-capacitor (FGT-C) biquadratic sections that provide either lowpass or bandpass outputs. In the proposed biquadratic filter, all filter parameters including the gains, quality factor, natural frequency, and input and output DC levels can be adjusted by programming charges on floating gates. The filter topology exhibits good modularity so the biquadratic sections can be cascaded and scaled up to implement high-order frequency responses easily with efficient area and power consumption. Each FGT-C biquadratic filter occupies an area of 0.0313mm^2. From measurement results, the filter consumes 118.4 nW of power with a dynamic range of 45.5 dB while operating at 1.8V power supply with a 10kHz bandwidth.

A floating-gate based low-power reconfigurable analog front-end channel, including a low-noise amplifier (LNA), a variable gain amplifier (VGA), and two reconfigurable low-power Gm-C biquadratic filters, for biomedical and sensor applications is also designed and proposed in this thesis. The analog sensing frond-end circuits are integrated in a 0.35um CMOS process and occupy an area of 0.62mm^2. The bandwidth and the gain of proposed analog sensing circuits can be adjusted by programming the charge in floating gates. The prototype chip is programmed to different configurations to sense electrooculography (EOG), electrocardiography (ECG) and electromyography (EMG) signals. The total current consumption in these three configurations is 0.13μA, 0.22μA, and 0.84μA,respectively. The measured total input referred noise in these bandwidth settings are 2.67uVrms, 3.25uVrms, and 3.8uVrms, respectively. The measured noise efficiency factors in these three settings are 3.72, 3.73, and 4.26 respectively.

摘要................................................................i
Abstract.............................................................ii
目錄...............................................................iv
圖目錄.............................................................vi
表目錄............................................................viii
第一章 類比前端電路之設計理念......................................1
1.1 設計動機....................................................1
1.2 醫療感測電路................................................1
1.3 類比記憶體及可靠性..........................................3
第二章 應用於植入式人工耳蝸之可編程微型
低功耗懸浮閘電晶體電容濾波器.................................6
2.1 設計動機....................................................6
2.2 轉導電容雙二階濾波器........................................8
2.3 懸浮閘電晶體電容雙二階濾波器................................9
2.4 懸浮閘電晶體編程步驟.......................................11
2.5 量測結果...................................................11
2.5.1 轉導放大器特性曲線....................................12
2.5.2 可編程雙二階濾波器....................................13
2.5.3 高階濾波器實現........................................15
2.6 結論與討論.................................................16
第三章 應用於生理訊號之可編程低功耗類比前端電路...................18
3.1 設計動機...................................................18
3.2 可編程化低功耗類比前端電路.................................19
3.2.1 可編程低功耗低雜訊放大器..............................20
3.2.1.1懸浮閘全差動轉導放大器...........................21
3.2.1.2可編程回授偽電阻.................................23
3.2.2 可編程之可變增益放大器................................26
3.2.2.1 T網路回授電容設計...............................26
3.2.1.1懸浮閘全差動轉導放大器及可編程回授偽電阻.........28
3.2.3 可編程之轉導電容濾波器................................28
3.2.3.1 轉導放大器設計..................................30
3.2.3.1.1基本差動對.................................29
3.2.3.1.2 常用之增加線性化技術.......................31
3.2.3.1.3 非線性消除.................................32
3.2.3.1.4 高效能線性化之轉導放大器...................34
3.3量測結果....................................................37
3.3.1 子架構頻率響應量測....................................38
3.3.2 類比前端電路編程量測及結果............................39
3.3.3 生理訊號量測..........................................42
第四章 結論及未來展望..............................................43
4.1 論文結論...................................................43
4.2 未來展望...................................................44
參考文獻...........................................................45

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