臺灣博碩士論文加值系統

近年來隨著視訊軟硬體技術的進步與消費者觀看需求，JCT-VC在2013年訂定了高效能視訊編碼(H.265/HEVC)標準，提供消費者超高畫質(UHD)的視訊服務(最高解析度可達8K)。雖然H.265/HEVC與目前H.264/AVC視訊標準相較之下，其編碼效能約可增進50%，但相對的其系統複雜度也大幅提高，導致在進行即時視訊編解碼時，會造成很高的實施難度。為了降低H.265/HEVC編碼複雜度，本論文分別提出快速CTU的四分樹深度範圍的決策方法、鄰近區塊參考畫面演算法(NRFDA)和優先參考畫面演算法(PRFSA)，並進一步結合成為快速H.265/HEVC視訊編碼演算法，來大幅降低其編碼複雜度。另外，為了改善H.265/HEVC解碼器的效能和實用性，論文也提出一植基於OpenHEVC之彈性記憶體架構(FMAA)設計，並完成在DSP的硬體實現，來達到即時視訊解碼與應用。
為了加快H.265/HEVC的編碼過程，我們首先利用相鄰CTU與當前CTU間具有高的深度時空關聯性，利用9個時間與4個空間已編相鄰的CTU，來預測當前CTU的深度範圍，預先排除修剪最佳四分樹過程中的無效深度加速編碼過程，相較於HM16.7可獲得平均約42%~82%的時間改善率。為了進一步提升編碼效能，H.265/HEVC允許採用多重參考畫面運動估測(MRF-ME)，然而這導致ME的計算量大幅度增加。同樣地，為了降低MRF-ME的計算複雜度，我們利用參考畫面間具有高的時空關聯性，提出鄰近區塊參考畫面演算法(NRFDA)和優先參考畫面演算法(PRFSA)。NRFDA是利用鄰近已編碼區塊的最佳參考畫面資訊和待編區塊物件的變異數，來預測最佳參考畫面資訊。另外，為了更有效的減少MRF-ME運算次數，PRFSA經事先統計各畫面AMVP所對應的最佳RDcost (JAMVP)和最佳模式的RDcost (JInter)間的相關性，發現JAMVP 和JInter兩者具有高度的正關聯性，因此PRFSA利用各JAMVP值由小到大排序來決定參考畫面的優先次序，來大量減少MRF-ME模組的運算次數。最後，我們結合NRFDA和PRFSA兩種方法，完成快速參考畫面決策演算法(FRFDA)，最後結果顯示當參考畫面為4張時，論文所提FRFDA與HM16.7相比較，參考畫面平均減少約2.73張，時間改善率平均提高約68.23%。
最後，為了完成在ADSP-BF548的嵌入式H.265/HEVC視訊解碼器，我們提出一植基於OpenHEVC之彈性記憶體架構(FMAA)設計。首先對H.265/HEVC解碼器各模組進行複雜度分析，利用所提FMAA將複雜度最高的運動補償(MC)和反量化和反餘弦轉換(IQ/IT)等模組，從L3 DDR-RAM彈性配置到L1和L2 SRAM，來加速運算模組的運算速度，大幅降低H.265/HEVC解碼器時間。從視訊解碼的測試結果顯示，所提FMAA嵌入式H.265/HEVC視訊解碼時間比直接嵌入OpenHEVC加速約2.5倍，更比直接嵌入HM16.7的時間快約6倍。另由實驗結果發現，當採用4核心DSP進行硬體實現，論文所提FMAA嵌入式H.265/HEVC視訊解碼器，可達到即時視訊解碼的應用。

The new high efficiency video coding (HEVC) standard approved as ITU-T H.265 (H.265/HEVC) facilitates the realization of ultrahigh-definition (UHD) video applications. Although the compression efficiency of the H.265/HEVC coding standard is double that of H.264/AVC, it incurs a very high encoding complexity. In order to reduce the encoding complexity of H.265HEVC, we proposed some fast encoding strategies including coding unit (CU) depth range decision algorithm, neighboring-blocks-based reference frame decision algorithm (NRFDA) and priority-based reference frame selection algorithm (PRFSA). In addition, in order to reach real-time video applications of H.265/HEVC decoder, we also embedded a highly efficient DSP-based OpenHEVC on ADSP-BF548 processor.
To speed up the encoding procedure of H.265/HEVC, a fast CU depth range decision is firstly proposed to reduce the searching range. Based on the depth information correlation between tempo-spatial adjacent CTUs and the current CTU, some depths can be adaptively excluded from the depth search process in advance. The best depth of current CTU is determined by an intersection between temporal predicted depth ranges by 9 Gaussian weightings and spatial predicted depth ranges by 4 best weightings from encoded blocks. Secondly, there are same characteristics existing multiple reference frame motion estimation (MRF-ME). To speed up the MRF-ME process, we proposed NRFDA and PRFSA to reduce the computational complexity. NRFDA select the reference frame of the current block from its neighboring blocks due to a high possibility to be all the same optimal reference frame. PRFSA analyses the RD cost correlation between AMVP (JAMVP) and ME (JInter) in MRF-ME process. Therefore, PRFSA defines the priority for each reference frame so that ME can perform on the reference frames along the descending order of priority according to JAMVP. Finally, we integrated three above-proposed methods into finishing a fast H.265/HEVC encoder with insignificant loss of image quality.
To realize an embedded fast H.265/HEVC decoder on ADSP-BF548 processor, we proposed a flexible memory assignment architecture (FMAA) to efficiently control memory. In H.265/HEVC decoder, the most consuming processes are motion compensation (MC) and inverse quantization/inverse integer cosine transform (IQ/IT) modules. To reduce the decoding time, the proposed FMAA assigns the functions of MC and IQ/IT from L3 DDR-RAM to L1 and L2 SRAM. The proposed DSP-based H.265/HEVC decoder is based on the open source OpenHEVC. Experimental results show that the proposed method can achieve an average acceleration of H.265/HEVC decoding about 2.5 and 6 times when compared with the directly embedded OpenHEVC and HM16.7 on ADSP-BF548, respectively. It can actually reach real-time decoding when we implement our method on multi-core DSP-based hardware with four cores.

摘要 i
ABSTRACT iii
List of Contents v
List of Tables vii
List of Figures viii
Chapter 1 Introduction 1
1.1 Motivation 1
1.2 Evolution of Video Coding Standards 2
1.3 Research Objects and Contributions 4
1.4 Organization of the Dissertation 6
Chapter 2 A Review of H.265/HEVC Video Coding Standard 7
2.1 H.265/HEVC Video Coding Architecture and Specification 7
2.2 H.265/HEVC Coding Tools 9
2.2.1 Intra prediction 10
2.2.2 Inter prediction 11
2.2.3 Transformation and quantization 14
2.2.4 CTU decision tree 16
2.2.5 Multiple reference frame 17
2.2.6 Reference picture settings (RPS) 18
2.2.7 Advanced motion vector prediction (AMVP) 20
2.2.8 Best reference frame 23
Chapter 3 Fast Encoding Algorithms for H.265/HEVC 27
3.1 Fast H.265/HEVC Encoding Based on Tempo-spatial Correlation 27
3.1.1 Observations and statistical analysis in HM 31
3.1.2 Proposed fast encoding algorithm 33
3.1.3 Simulation results 38
3.2 Fast Multi-frame Selection Algorithms for H.265/HEVC 42
3.2.1 Fast reference frame selection algorithm (FRPSA) 42
3.2.2 Neighboring-blocks-based reference frame decision algorithm (NRFDA) 47
3.2.3 Priority-based reference frame selection algorithm (PRFSA) 52
3.2.4 Fast reference frame decision algorithm (FRFDA) 56
3.2.5 Experimental results 58
Chapter 4 DSP-based H.265/HEVC Decoder 62
4.1 Architecture of ADSP-BF548 62
4.2 Implementation of H.265/HEVC Decoder 64
4.2.1 H.265/HEVC decoding process 64
4.2.2 FMAA method 66
4.2.3 Parallelization architecture 67
4.2.4 Test results 69
Chapter 5 Conclusions 72
References 73

[1]J. Ohm, W. J. Han and T. Wiegand,“Overview of the high efficiency video coding (HEVC) standard”，IEEE Trans. Circuits Syst. Video Technol.,vol. 22 no. 12, pp. 1649- 1668, Dec. 2012.
[2]B. Bross, W. J. Han, J. R. Ohm, G. J. Sullivan and T. Weingand,“High efficiency video coding (HEVC) text specification draft 8”, JCT-VC Document, JCTVC-J1003, July 2012.
[3]High Efficiency Video Coding, Rec. ITU-T H.265 and ISO/IEC 23008-2, Jan. 2013.
[4]“ITU-T Home : Study groups : ITU-T Recommendations : ITU-T H.265 (V2) (10/2014)”, ITU-T 2014-10-29.
[5]J. Ohm, G. J. Sullivan, H.Schwarz,T. K. Tan,T. Wiegand,“Comparison of the coding efficiency of video coding standards-including high efficiency video coding(HEVC)”,IEEE Trans.Circuits System Video Technology, vol. 22, no. 12, Dec. 2012.
[6]S. H. Yang, and K. S. Huang, “H.265 fast reference picture selection,” Electronics letters 10th December 2015 vol. 51 no. 25 pp. 2109–2111
[7]S. Wang and S. Ma, “Fast multi-reference frame motion estimation for high efficiency video coding,” IEEE International Conference on Image Processing (ICIP), pp. 2005-2009, Sept. 2013
[8]J. Y. Kao, H. M. Hung and C. C. Wang, "A fast multi-frame selection algorithm for H.265 video coding", 2018 Asian Conference on Engineering and Natural Sciences (2018ACENS), pp.364~366, Osaka, Japan, Feb. 2018
[9]“Information technology ─ Generic coding of moving picture and associated audio information ─ Part 2: Video,” ISO/IEC FDIS 13818-2, MPEG-2 1994.
[10]Joint Video Team software JM11.0, http://iphome.hhi.de/suehring/tml/download/ old_jm/jm11.0.zip
[11]L. Shen, Z. Liu, X. Zhang, W. Zhao, Z. Zhang, “An effective CU size decision method for HEVC encoders,” IEEE Trans. Multimedia, vol. 15, no. 2, pp. 465- 470, Feb. 2013.
[12]X. L. Shen, L. Yu and J. Chen, “Fast coding unit size selection for HEVC based on Bayesian decision rule,” The Picture Coding Symposium (PCS) 2012, pp. 453-456, May. 2012.
[13]C. C. Wang and J. Y. Kao, “Fast encoding algorithm for H.265/HEVC absed on tempo-spatial correlation,” International Journal on Computer, Consumer and Control, vol. 4, no. 1, pp. 51-58, Feb. 2015
[14]H. S. Lee, K. Y. Kim, T. R. Kim and G. H. Park, “Fast encoding algorithm based on depth of coding-unit for high efficiency video coding,” Optical Engineering, vol. 51, no.6, June 2013.
[15]Y. Zhang, H. Wang and Z. Li “Fast coding unit depth decision algorithm for interframe coding in HEVC,” Data Compression Conference, pp. 53-62, Mar. 2013.
[16]S. Cho and M. Kim, “Fast CU splitting and pruning for suboptimal CU partitioning in HEVC intra coding,” IEEE Trans. Circuits and Systems for Video Technology, vol. PP no. 99, pp. 1, Feb. 2013
[17]K. Choi and E. S. Jang, “Early TU decision method for fast video encoding in high efficiency video coding,” IEEE Electronics Letters., vol. 48, no. 12, pp. 689- 691, Jun. 2012
[18]HEVC test model (HM16.7) documentation. https://hevc.hhi.fraunhofer.de /HM-doc/
[19]G. Bjøntegaard, “Calculation of average PSNR differences between RD-curves,” ITU-T Document VCEG-M33, pp. 1-5, April 2001.
[20]FFmpeg: Open source and cross-platform multimedia library, https://www.ffmpeg.org/
[21]“ADSP-BF548 EZ-KIT Lite Evaluation System Manual,” Revision 1.3, October ( 2008).
[22]“ADSP-BF548 Data Sheets,” Analog Devices, Inc., http://www.analog.com/ static/importedfiles/eval_kit_manuals/ADSP_BF548_ekman_ezkit_Rev1.0_1107.pdf
[23]F. Pescador, P. Cano, M. J. Garrido, E.Juarez, “A DSP HEVC decoder implementation based on OpenHEVC,” 2014 IEEE International Conference on Consumer Electronics (ICCE), pp.61-62, Jan. 2014.
[24]Institute of Electronics and Telecommunications Rennes: IETR. http://www.ietr. fr/spip.php ? rubrique99&lang=f
[25]Open source HEVC decoder (OpenHEVC), https://github. com/OpenHEVC.
[26]J. Y. Kao, Y. K. Lin and C. C. Wang, “Efficient DSP-based HEVC video hardware decoding system,” International Journal of Trend in Research and Development, vol. 5, no. 1, pp. 391-394, Feb. 2018
[27]J. Y. Kao, C. C. Wang, T. T. Peng and I. A. Chen, “A study of DSP implementation of high efficient H.265/HEVC decoder based on OpenHEVC,” 2016 Seoul International Conference on Engineering and Applied Science (SICEAS), pp.204-206, Seoul, Korea, Jan. 2016