臺灣博碩士論文加值系統

本研究使用TSMC 0.18μm Mixed Signal/RF 1P6M CMOS製程研製UHF 915MHz 被動式射頻辨識標籤電路設計。電路中成功整合了電壓乘法器、電壓限制器、穩壓器、振盪器及數位控制電路，晶片面積包含I/O Pads占0.72 × 0.79mm^2。前端電路工作所需的能量來自於無線電波之能量的擷取，為了增加輸出電壓及功率轉換效能，我們使用Native CMOS元件之零臨界電壓特性去建置十二級電壓乘法器電路。整體前端電路可接收最小輸入功率 0.8V的RF訊號產生1.3V的電壓做為晶片內部的電源供應，並驅動其他內部電路正常工作，內部振盪器可輸出1.2MHz的穩定時脈，最後由數位控制電路裡的數位調變器輸出64-bits的調變訊號。在由晶片採用打線至印刷電路板上，並加入匹配網路做整合量測，功率消耗為1.7μW。

In this thesis, an UHF 915MHz passive circuit design for RFID transponder is proposed by using TSMC 0.18μm Mixed Signal/RF 1P6M CMOS process. The passive circuit consists of a voltage multiplier, a voltage limiter, a voltage reference, a regulator, an oscillator and a digital signal control circuit. The chip area only requires 0.72 × 0.79mm^2 with I/O pads. The power for front-end circuit is harvested from the incident UHF radio waves. In order to increase output voltage and power efficiency, we used zero threshold voltage of native CMOS device to establish 12-stage voltage multiplier. The passive front-end circuit can generate DC voltage 1.3V in minimum input power is as low as 0.8V. This stable voltage can power up the other internal circuits and make them work regularly. The internal output of oscillator is 1.2MHz. Finally, output a 64-bits modulation signal by the digital signal control circuit in the digital modulator. The chip used bond-wire to printed circuit board and used matching components to measurement, the power consumption is approximately 1.7μW.

Contents

Chinese Abstract i
English Abstract ii
Contents I
List of Figures IV
List of Tables VIII

Chapter1 Introduction 1
1.1 Background and Applications 1
1.2 Motivation 4
1.3 Thesis Organization 5

Chapter2 The Overview of RFID System 6
2.1 The Type of RFID Tag 6
2.2 The Operating Frequency of RFID System 7
2.3 RFID System Components and Operating Method 9
2.3.1 Operation Principle of RFID System 9
2.3.2 Communication and Energy Transfer 10
2.4 The Standards of RFID System 12
2.4.1 ISO Standard 12
2.4.2 EPC Standard 13
2.5 Modulation Type 18
2.5.1 ASK Modulation 20
2.5.2 FSK Modulation 21
2.5.3 PSK Modulation 22

Chapter3 UHF Passive RFID Tag Circuits Design 23
3.1 Introduction 23
3.2 Architecture 24
3.2.1 Matching Network 25
3.2.2 Charge Pump 26
3.2.2.1 Voltage Multiplier 27
3.2.2.2 Voltage Limiter and Voltage Reference 31
3.2.2.3 Regulator 34
3.2.3 Demodulator 35
3.2.4 Ring Oscillator 36
3.2.5 Digital Signal Control Circuit 37
3.2.5.1 TSPC Divider Circuit 37
3.2.5.2 Parallel-to-Serial Circuit 38
3.2.5.3 3 to 8 Decoder 40
3.2.5.4 64-bits ROM 41
3.2.5.5 Digital Modulation Circuit 43

Chapter4 Simulation and Measurement Results 44
4.1 Simulation Results 44
4.1.1 Voltage Multiplier 44
4.1.2 Charge Pump 52
4.1.3 Demodulator 56
4.1.4 Ring Oscillator 57
4.1.5 TSPC Divider 57
4.1.6 3 to 8 Decoder 58
4.1.7 64-bits ROM 58
4.1.8 Digital Modulation Circuit 59
4.1.9 Matching Network 59
4.1.10 Whole Circuits 61
4.1.11 Summary Table 64

4.2 Measurement Results 65
4.2.1 Demodulator of UHF Passive RFID Tag (T18-100C) 65
4.2.1.1 Architecture (T18-100C) 65
4.2.1.2. Matching Network 65
4.2.1.3 Testing Environment (T18-100C) 67
4.2.1.4 Measurement Results (T18-100C) 68
4.2.1.5 Summary Table (T18-100C) 69
4.2.2 UHF Passive RFID Transponder Circuit (T18-101A) 70
4.2.2.1 Architecture (T18-101A) 70
4.2.2.2. Matching Network(T18-101A) 70
4.2.2.3 Testing Environment (T18-101A) 71
4.2.2.4 Measurement Results (T18-101A) 74
4.2.2.5 Summary and Comparison Table (T18-101A) 77
Chapter5 Conclusion 78
References 79
Vita 82

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