臺灣博碩士論文加值系統

近年來，數位生活在台灣電子工業市場扮演了舉足輕重的角色，數位電子產品的應用已經受到廣大的青睞，像是數位相機、筆記型攜帶式、攜帶隨身聽MP3或CD、信用卡晶片，攜帶型USB記憶體或記憶卡和日常生活會用到的PDA、GPS 等等。這些個人式電子產品的發展則基於非揮發性記憶體元件的低功率消耗和可攜式。傳統的非揮發性記憶體是利用複晶矽浮停閘(floating gate)作為載子儲存的單元，而在元件尺寸持續微縮下，該結構將面臨一些瓶頸。當電子從通道注入浮停閘儲存層，記憶體元件將會受到儲存載子影響它本身存在電場的影響，造成起始電壓的漂移。我們可將受浮停閘改變的起始電壓定義為1與O。然而，因為這種浮停閘結構為整層的半導體薄膜，在電子反覆的從穿遂氧化層進出這層浮停閘，會使得穿遂氧化層劣化以至於出現缺陷，當缺陷一旦產生之後，所有儲存的電子將會隨這層缺陷而產生局部漏電路徑，導致所寫入的儲存載子全部流失掉，無法達到原本應有之記憶的效果。
矽化鈷是一種金屬矽化合物現今已經因為它本身的低電阻( 10-20 ~μΩcm)和熱穩定性而被廣大的應用在接觸面上。在本論文中我們使用共同濺鍍和快速退火系統分別進行薄膜沉積和進行退火。我們會使用快速退火系統是因為溫度控制的方便性和利用減少熱預算來降低擴散程度。
在本篇論文，我們透過濺鍍系統共打的方式沉積鈷、矽、鍺的混合性薄膜，再利用快速退火的方式製作一種新穎之矽化鈷物奈米點於含鍺介電層，並研究該結構金氧絕氧半(MOIOS)結構之儲存效益。除了此金氧半電容結構之C-V、J-V量測外，並透過一些材料分析如二次離子能譜(SIMS)、X光光電子能譜儀(XPS)釐清各元素扮演儲存機制之角色。此外，我們亦研究透過共同濺鍍金屬鈷和介電質材料如氧化矽，氮化矽及氧化鋁作為儲存層，透過電性量測，該結構亦展示不錯之載子儲存效果，除電性量測外亦透過相關之材料分析X光光電子能譜儀(XPS) 探討在不同介電質材料之間的形成機制。

In recent years, digital life has attracted great importance for Taiwan，s electronics market. Then he portable electronic products have been applied widely, such as digital cameras, notebooks, hand-carry USB memories, a chip on credit card , PDA, GPS, memory card, MP3 audio players and so on. However, these portable electronic products are based on the nonvolatile memory (NVM) due to the need of low working power and portability. In a conventional nonvolatile memory (NVM), charge is stored in a ploy-silicon floating-gate (FG). However, it suffers some limitations for continual scaling down of the device structure. In FG memory, the electrons which injected from channel to the poly-silicon trapping layer influence the shift of threshold voltage in the memory. Then it can be defined through the difference of threshold voltages as logic “0” & “1”. Nevertheless, the definition fails if the tunneling oxide provides a leakage path after repeatedly performing write/erase cycling. On other hand, the oxide will produce some defect after repeat impact during electrons the write/erase cycle because the whole structure of FG is semiconductor. All of the charge stored in FG will be trapped into trapping layer or be lost from trapping layer with leak path which was formed with defects. FG structure will have reliability problem when device scale down to nano-meter level.
Among the Metal Silicide, cobalt-silicide (CoSi2) has been widely used as a contact source due to the lowest resistivity value ( 10-20 ~μΩcm) and good thermal stability. In this thesis, CoSi2 films were sputtered and we choose rapid thermal annealing (RTA) and sputter system in order to reduce process cost because of temperature controlling and reduce thermal budget because of diffusion reducing.
Co-sputtering approach was used to deposit the mixed cobalt, silicon and germanium film. After rapid temperature oxidation (RTO), Novel cobalt silicide nanocrystals embedded in the dielectrics which are doped with Ge have been formed. The charge storage effect of this novel trapping layer have also been investigated by capacitance-voltage (C-V), current density-voltage (J-V) measurement. Transmission Electron Microscopy (TEM), Secondary Ion Mass Spectrometer (SIMS) and X-ray photoelectron spectroscopy (XPS) have been used to analyze formation of the cobalt-silicide nanocrystals. In addition, the structure formed by co-sputtering the Co target with SiO2, Si3N4 target and Al2O3 target have also been demonstrated in this work. The approach also shows good charge storage ability. The charge storage mechanism of various dielectrics has also been revealed by related material analysis.

Chapter 1 Introduction
1.1 General Background 1
1.1.1 The era of memory 1
1.1.2 The basic structure of memory 5
1.2 SONOS Nonvolatile memory Devices 8
1.3 Nanocrystal Nonvolatile Memory Devices 10
1.4 Motivation 14
1.4.1 Study on formation of cobalt-silicide (CoSi2) nanocrystals for the application on nonvolatile memory 16
1.4.2 Post-oxidation annealing procedures of Co-Si-Ge thin film as trapping layers in oxygen ambient by annealing system 17
1.4.3 The role of capped oxide during the formation of cobalt-silicide (CoSi2) nanocrystals in Ge-doped dielectric layer 17

Chapter 2 Nonvolatile Memory-basic concept and operation mechanism
2.1 Reading operation 19
2.2 Basic Program/Erase Mechanisms 21
2.2.1 Carrier Injection Mechanisms 21
2.2.2 Channel Hot Electron (CHE) Injection 23
2.2.3 Fowler–Nordheim (FN) Tunneling 24
2.2.4 Direct Tunneling (DT) 26
2.3 Basic Physics Characteristics of Nanocrystal Memory 26
2.3.1 Quantum Confinement Effect 26
2.3.2 Coulomb Blockade Effect 27


Chapter 3 Experimental procedures
3.1 Sample Preparation 29
3.1.1 Method of Wafer pre-cleaning and fabricating tunnel oxide 29
3.1.2 Method and condition of fabricating Co-Si-Ge thin film 29
3.1.2.1 Sample study on formation of Cobalt-Silicide (CoSi2) nanocrystals 29
3.1.2.2 Sample study on Post-oxidation annealing procedures of Co-Si-Ge thin film. 30
3.1.2.3 Sample study on the role of capped oxide 31
3.1.3 Method and condition of fabricating Co-Si-Ge thin film 32
3.2 Physical Characterization Techniques 36
3.2.1 Focused Ion Beam (FIB) 36
3.2.2 Transmission Electron Microscopy (TEM) and Energy dispersive X-ray spectroscopy (EDX) 36
3.2.3 X-ray photoelectron spectroscopy (XPS) 36
3.2.4 secondary ion mass spectrometry (SIMS) 36
3.3 Physical Characterization Techniques 37

Chapter 4 Results and Discussion
4.1 Study on formation of cobalt-silicide (CoSi2) nanocrystals for the application on nonvolatile memory 38
4.2 Post-oxidation annealing procedures of Co-Si-Ge thin film as trapping layers in oxygen ambient by annealing system 43
4.2.1 Results 45
4.2.1.1 Electrical characteristics 45
4.2.1.2 Material analysis 46
4.2.2 The discussion 56
4.2.2.1 Discussion on electrical characteristics 56
4.2.2.2 Reaction free energy 57
4.2.2.3 Formation of CoSi2 nanocrystal after annealing 58
4.3 The role of capped oxide during the formation of cobalt-silicide (CoSi2) nanocrystals in Ge-doped dielectric layer 62

Chapter 5 Conclusion
5.1 Conclusion 71

Addendum A Metal Co-SiO2 and Co-Si3N4 co-sputtering as trapping film of Cobalt mixtures and future development
A.1 Motivation 73
A.2 Experimental procedure 74
A.3 Results and discuss 76
A.4 Summary and future development 89
A.5 Future development 89

Addendum B Observations of metal Co-Al2O3 co- sputtering and future development
B.1 Motivation 91
B.2 Experimental procedure 91
B.3 Results and Discussion 93
B.4 Summary 101
B.5 Future development 102

References
Chapter 1 104
Chapter 2 109
Chapter 4 111
Addendum A 113
Addendum B 114

[1-1]
Simon M. Sze, Kwok K. Ng, s
"Physics of Semiconductor Device"
Wiley, New York

[1-2]
Kahng, K. Sze, S.M.
"A floating gate and its application to memory devices "
1967

[1-3]
Jong Jin Lee Xuguang Wang Weiping Bai Nan Lu Dim-Lee Kwong
"Theoretical and experimental "investigation of Si nanocrystal memory device with HfO2 high-k tunneling dielectric"
IEEE Trans. Electron Devices 50, 2067 2003

[1-4]
M. H. White, Y. Yang, A. Purwar, and M. L. French
"A low voltage SONOS nonvolatile semiconductor memory technology"
IEEE Int’l Nonvolatile Memory Technology Conference, 52 1996

[1-5]
M. H. White, D. A. Adams, and J. Bu
"On the go with SONOS"
IEEE circuits & devices, 16, 22 2000

[1-6]
H. E. Maes, J. Witters, and G. Groeseneken
"17th European Solid State Devices Research Conference"
p. 157 1988

[1-7]
S. Tiwari, F. Rana, K. Chan, H. Hanafi, C. Wei, and D. Buchanan
"Volatile and non-volatile memories in silicon with nano-crystal storage"
IEEE Int. Electron Devices Meeting Tech. Dig., 521 1995

[1-8]
J. J. Welser, S. Tiwari, S. Rishton, K. Y. Lee, and Y. Lee
"Room temperature operation of a quantum-dot flash memory"
IEEE Electron Device Lett., 18, 27 8 1997

[1-9]
Y. C. King, T. J. King, and C. Hu
"MOS memory using germanium nanocrystals formed by thermal oxidation of Si1-xGex"
IEEE Int. Electron Devices Meeting Tech. Dig., 115 1998

[1-10]
Frohman-Bentchkowsky, D.
"A fully decoded 2048-bit electrically programmable FAMOS read-only memory"
Solid-State Circuits, IEEE Journal of 1971

[1-11]
Iizuka, H. Masuoka, F. Tai Sato Ishikawa, M.
"Electrically alterable avalanche-injection-type MOS READ-ONLY memory with stacked-gate structure"
Electron Devices, IEEE Transactions on 1976

[1-12]
A. Scheibe , Heinz Schulte
"Technology of a new n-channel one-transistor EAROM cell called SIMOS"
Electron Devices, IEEE Transactions on 1977

[1-13]
Wegener, H A R; Lincoln, A J; Pao, H C; O' Connell, M R; Oleksiak, R E; Lawrence, H
"The variable-threshold transistor, a new electrically-alterable, nondestructive READ-only storage device"
IEEE Transactions on Electron Devices. Vol. 15, no. 6, pp. 420-421 1968 presented at the Internaional Electron Devices Meeting 1967

[1-14]
T. Y. Chan, K. K. Young, and C. Hu
"A true single-transistor oxide–nitride–oxide EEPROM device"
IEEE Electron Device Lett., vol EDL-8, pp. 93–95 Mar. 1987

[1-15]
M. White, Y. Yang, P. Ansha, and M. L. French
"A low voltage SONOS nonvolatile semiconductor memory technology"
IEEE Trans. Compon,Packag., Manufactur. Technol., vol. 20, pp. 190–195 Jun. 1997

[1-16]
M. K. Cho and D. M. Kim
"High performance SONOS memory cells free of drain turn-on and over-erase: Compatibility issue with current flash technology"
IEEE Electron Device Lett., vol. 21, pp. 399–401 Aug. 2000

[1-17]
I. Fijiwara, H. Aozasa, K. Nomoto, S. Tanaka, and T. Kobayashi
"High speed program/erase sub 100 nm MONOS memory cell "
in Proc. 18th Non-Volatile Semiconductor Memory Workshop, pp. 75–75 2001

[1-18]
Y Yang, A Purwar, MH White
"Reliability considerations in scaled SONOS nonvolatile memory devices"
Solid State Electronics 1999

[1-19]
H. E. Maes, J. Witters, and G. Groeseneken
"in Proceedings of the 17th European Solid State Devices Reseach Conference" Bologna, Italy, 1987, p. 157 1988

[1-20]
S. Tiwari, F. Rana, K. Chan, H. Hanafi, C. Wei, and D. Buchanan
"Volatile and non-volatile memories in silicon with nanocrystal storage"
IEEE Int. Electron Devices Meeting Tech. Dig., 521 1995

[1-21]
Suk-Kang Sung
"Program/Erase Characteristics of Nanoscale SONOS Memory and Feasibility of Multi-Level Operation in Multi-Layer SONOS"
SMDL Annual Report 2003

[1-22]
F Rana, K Chan, H Hanafi, W Chan, D Buchanan
"Volatile and Non-Volatile Memories in Silicon with Nano-Crystal Storage"
IEDM Tech. Dig. p.521 1995

[1-23]
Sandip Tiwari, Farhan Rana, Hussein Hanafi, Allan Hartstein, Emmanuel F. Crabbe,Kevin Chan
"A silicon nanocrystals based memory"
Appl. Phys. Lett. 68, pp1377 1996

[1-24]
J. J. Welser, S. Tiwari, S. Rishton, K. Y. Lee, and Y. Lee
"Room temperature operation of a quantum-dot flash memory"
IEEE Electron Device Letters., vol.18, pp. 278-280 1997

[1-25]
Sugizaki, T. Kobayashi, M. Ishidao, M. Minakata, H. Yamaguchi, M. Tamura, Y. Sugiyama, Y. Nakanishi, T. Tanaka, H.
"Novel Multi-bit SONOS Type Flash Memory Using a High-k Charge Trapping Layer"
Symposium on VLSl Technology Digest of Technical Papers 2003

[1-26]
T. C. Chang, S. T. Yan, P. T. Liu, C. H. Hsu, M. T. Tang , and S. M. Sze
"A novel distributed charge storage with GeO2 nano-dots" Appl. Phys. Lett, 84(14), p.2581 2004

[1-27]
Froment, B. Muller, M. Brut, H. Pantel, R. Carron, V. Achard, H. Halimaoui, A. Boeuf, F. and Wacquant, F
"Nickel vs. cobalt silicide integration for sub-50nm CMOS"
European Solid-State Device Research, p.215 2003

[1-28]
Wang, L. Bridgman, B. Klein, G. Liying Wu, Darilek, J.
"Study of junction leakage caused by cobalt silicide defects"
SMTWP., pp. 201-203 2004

[1-29]
Wein-Town Sun, Ming-Chi Liaw, and Hsu, C.C.-H.
"Suppression of cobalt silicide agglomeration using nitrogen (N2+) implantation
Electron Device Letters, IEEE, vol. 19, NO. 5 1995

[1-30]
Sarcona, G.T. Stewart, M. and Hatalis, M.K.
"Polysilicon thin-film transistors using self-aligned cobalt and nickel silicide source and drain contacts
Electron Device Letters, IEEE, vol. 20, NO. 7 1999

[1-31]
Zengtao Liu, Chungho Lee, Venkat Narayanan, Gen Pei, and Edwin Chihchuan Kan, Member, IEEE
"Metal Nanocrystal Memories—Part II: Electrical Characteristics"
IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 49, NO. 9, SEPTEMBER 2002

[1-32]
A. Alberti, F. La Via, M.G. Grimaldi, S. Ravesi.
"Cobalt silicide thermal stability: from blanket thin flm to submicrometer lines"
Solid-State Electronics 43 1039±1044, 1999

[1-33]
F. M. Yang, T. C. Chang, P. T. Liu, P. H. Yeh_ and U. S. Chen, Y. C. Yu and J. Y. Lin, S. M. Sze and J. C. Lou
"Using double layer CoSi2 nanocrystals to improve the memory effects of nonvolatile memory devices"
Appl. Phys. Lett 90, 212108,2007

[1-34]
Jae-Duk Lee; Sung-Hoi Hur; Jung-Dal Choi;
" Effects of floating-gate interference on NAND flash memory cell operation "
Electron Device Letters, IEEE Volume 23, Issue 5, May 2002 Page(s):264 - 266

[1-35]
B. Govoreanu, D.P. Brunco and J. Van Houdt
" Scaling down the interpoly dielectric for next generation Flash memory: Challenges and opportunities "
Solid-State Electronics Volume 49, Issue 11, November 2005, Pages 1841-1848

[1-36]
F Rana, K Chan, H Hanafi, W Chan, D Buchanan.
" Volatile and Non-Volatile Memories in Silicon with Nano-Crystal Storage "
Int'l Electron Devices Meeting: Technical Digest, Washington …, 1995

[1-37]
S Tiwari, F Rana, K Chan, L Shi, H Hanafi
" Single charge and confinement effects in nano-crystal memories "
Appl. Phys. Lett. 69, 1232 (1996); DOI:10.1063/1.117421

[1-38]
J. H. Chen , Y. Q. Wang , W. J. Yoo , Y.-C. Yeo , G. Samudra , D. S. H. Chan , A. Y. Du and D.-L. Kwong
"Nonvolatile flash memory device using Ge nanocrystals embedded in HfAlO high-k "
Devices, vol. 51, pp. 1840, Nov. ,2004

[1-39]
CH Tu, TC Chang, PT Liu, HC Liu, SM Sze, CY Chang
" Improved memory window for Ge nanocrystals embedded in SiON layer "
Appl. Phys. Lett. 89, 162105 ,2006; DOI:10.1063/1.2362972

[1-40]
M. Hocevar, P. Regreny, A. Descamps, D. Albertini, G. Saint-Girons, A. Souifi, M. Gendry, and G. Patriarche.
" InAs nanocrystals on SiO2/Si by molecular beam epitaxy for memory applications "
Appl. Phys. Lett. 91, 133114 ,2007; DOI:10.1063/1.2793694

[1-41]
YK Cha, S Park, Y Park, IK Yoo, D Cha, JH Shin, SH
" Effect of hydrogenation on the memory properties of Si nanocrystals obtained by inductively coupled plasma chemical vapor deposition "
Appl. Phys. Lett. 89, 202112 ,2006; DOI:10.1063/1.2388144

[1-42]
Yu-Hsien Lin Chao-Hsin Chien Ching-Tzung Lin Ching-Wei Chen Chun-Yen Chang Tan-Fu Lei
" High performance multi-bit nonvolatile HfO/sub 2/ nanocrystal memory using spinodal phase separation of hafnium silicate "
IEEE Int. Electron Devices Meeting Tech. Dig., p. 1080 ,2004

[1-43]
J. Sarkar, S. Tang, D. Shahrjerdi, and S. K. Banerjee
" Vertical flash memory with protein-mediated assembly of nanocrystal floating gate"
Appl. Phys. Lett. 90, 103512 ,2007; DOI:10.1063/1.2711528

[1-44]
T. C. Chang, S. T. Yan, Y. H. Tai, P. T. Liu and S. M. Sze
" A distributed charge storage with GeO2 nanodots "
Appl. Phys.Lett. 84, p. 2581 ,2004


CHAPTER 2

[2-1]
L. Selmi and C. Fiegna
"Physical aspects of cell operation and reliability"
in Flash Memories, P. Cappelletti et al., Ed. Norwell, MA:Kluwer
1999

[2-2]
J. Bu, M. H. White
"Design considerations in scaled. SONOS nonvolatile memory devices"
Solid-State Electronics., vol. 45, pp. 113-120,2004

[2-3]
M. L. French, and M. H. White,
"Scaling of multidielectric nonvolatile SONOS memory structures"
Solid-State Electron., vol. 37, pp.1913-1923,1995

[2-4]
M. L. French, C. Y. Chen, H. Sathianathan, and M. H. White
"Design and scaling of a SONOS multidielectric device for nonvolatile memory applications"
IEEE Trans. Comp. Pack and Manu Tech part A., vol. 17, pp. 390-397,1994

[2-5]
B. Eitan and D. Frohman
"Hot-electron injection into the oxide in n-channel MOS devices"
IEEE Trans. Electron Devices, vol. ED–28 pp. 328–340, ,1981

[2-6]
P. Pavan, R. Bez, P. Olivo, and E. Zanoni
"Flash memory cells—An overview"
Proc. IEEE, vol. 85, pp. 1248–1271,1997

[2-7]
B. Eitan, P. Pavan, I. Bloom, E. Aloni, A. Frommer, and D. Finzi
"NROM: A novel localized trapping, 2bit nonvolatile memory cell"
IEEE Electron Device Lett., vol. 21, pp. 543–545,2000

[2-8]
Proc. SSDM 99, Tokyo, Japan, pp. 522–524.,1999

[2-9]
P. E. Cottrell, R. R. Troutman, T. H. Ning
"Hot-electron emission in n-channel IGFET's"
IEEE Journal of Solid-State Circuits, vol. 14, pp. 442-455,1979

[2-10]
A. Voros
"Wentzel-Kramers-Brillouin method in the Bargmann representation"
The American Physical Society,1989

[2-11]
M. Lenzlinger and E.H. Snow
"Fowler-Nordheim Tunneling into Thermally Grown SiO2"
J. Appl. Phys., vol.40, p.278,1969

[2-12]
Y. S. Hisamune, K. Kanamori, T. Kubota, Y. Suzuki, M. Tsukiji, E. Hasegawa,A. Ishitani, and T. Okazawa,
"A high capacitive-coupling ratio (HiCR) cell for3V-only 64Mb and future flash memories"
IEDM Tech. Dig., pp.19-22,1993

[2-13]
K. P.Johansson, A. P. Marchetti, G. B. McLendon
"However, for studies of indirect AgBr"
J. Phys. Chem. 96, 2873,1992

[2-14]
JP Proot, C Delerue, G Allan
"Electronic structure and optical properties of silicon crystallites: Application to porous silicon"
Appl. Phys. Lett. 61 1948,1992

[2-15]
T Takagahara, K Takeda
"Theory of the quantum confinement effect on excitons in quantum dots of indirect-gap materials"
Physical Review B. 46. 15578 ,1992

[2-16]
MS Hybertsen, Mater. Res. Soc. Proc. 256, 179 ,1992

[2-17]
Gorter, C.J.
"A possible explanation of the increase of the electrical resistance of thin metal films at low temperatures and small field strengths"
17, 777 (1951) Aug 01

I. Giaever and H. R. Zeller
"Superconductivity of Small Tin Particles Measured by Tunneling"
Phys. Rev. Lett. 20, 1504 – 1507,1968



CHAPTER 4

[4-1]
P. T. Goeller, B. I. Boyanov, D. E. Sayers and R. J. Nemanich
"Structure and stability of cobalt-silicon-germanium thin films"
Nuclear Instruments and Methods in Physics Research B. 133, p. 84-89 ,1997

[4-2]
K. Prabhakaran, K. Sumitomo and T. Ogino
"Oxidation of cobalt pre-reacted SiGe epilayer grown on Si(100) "
Surface Science, Volume 429, Number 1, 15 June 1999 , pp. 274- 278(5)

[4-3]
K. Prabhakaran and T. Ogino
"Oxidation behavior of cobalt silicide and cobalt germanide thin films "
Applied Surface Science Volumes 121-122, 2 November 1997, Pages 213-217 Iketani-6

[4-4]
Han-Joo Kim, Soo-Gil Park
"Development of aqueous polymeric gel electrolyte for Pseudo capacitor "
San 48, Kaeshindong, Heungdukgu, Cheongju, Chungbuk 361-763, Korea

[4-5]
Chen-Chan Wang, Jyun-Yi Wu, Yan-Kai Chiou, Che-Hao Chang, and Tai-Bor Wu
"Charge storage characteristics of Au nanocrystals embedded in high-k gate dielectrics on Si"
Appl. Phys. Lett S 91, 202110 2007

[4-6]
M. K. Bera, S. Chakraborty, and R. Das,G. K. Dalapati and S. Chattopadhyay ,S. K. Samanta and W. J. Yoo,A. K. Chakraborty,Y. Butenko and L. iller,M. R. C. Hunt,S. Saha,C. K. Maiti
"Rapid thermal oxidation of Ge-rich Si1–xGex heterolayers"
J.Vac. Sci. Technol. A,24(1),pp.1323-1329,2006

[4-7]
Steve L. Hsial, Teh Y. Tanl., Patrick L. Smith, and Gary E. McGuire
"Assured Epitaxial CO& Phase Formation on (001) Si-On-Insulator Substrates Using CoSi/Ti Bimetallic Source Materials"
1994 Symposium on VLSl Technology Digest of Technical Papers
0-7803-19212-4/94/ 0 1994 IEEE

[4-8]
Rudolf Zauner and Alan G. Jones
"Determination of nucleation, growth, agglomeration and disruption kinetics from experimental precipitation data: the calcium oxalate system"
Chemical Engineering Science
Volume 55, Issue 19, October 2000, Pages 4219-4232

[4-9]
Gong-Ru Lin, Chun-Jung Lin
"Watt Enhanced Electroluminescent Power of Silicon Nanocrystal Light-Emitting Diodes Made on Nano-Scale Silicon-Tip-Array Substrate"
0989-A10-05 Materials Research Society (MRS)

[4-10]
G.R. Lin, H.C. Kuo, H.S. Lin, and C.C. Kao
" Rapid self-assembly of Ni nanodots on Si substrate covered by a less-adhesive and heat-accumulated SiO2 layers "
Appl. Phys. Lett. 89, 073108,2006

[4-11]
O. Nur, M. Willander, L. Hultman, H. H. Radamson, G. V. Hansson, M. R. Sardela, Jr., and J. E. Greene
"CoSi2/Si1−xGex/Si(001) heterostructures formed through different reaction routes: Silicidation-induced strain relaxation, defect formation, and interlayer diffusion "
J. Appl. Phys. 78, 7063 ,1995

[4-12]
W. J. Qi, B. Z. Li, W. N. Huang, Z. G. Gu, H. Q. Lu, X. J. Zhang, M. Zhang, G. S. Dong, D. C. Miller, and R. G Aitken
" Solid state reaction of Co,Ti with epitaxially-grown Si1−xGex film on Si(100) substrate "
J. Appl. Phys. 77, 1086 ,1995


Addendum A

[A-1]
F. M. Yang,T. C. Chang,P. T. Liu,P. H. Yeh,Y. C. Yu and J. Y. Lin,S. M. Sze and J. C. Lou
"Memory characteristics of Co nanocrystal memory device with HfO2 as blocking oxide"
Appl. Phys. Lett. 90, 132102,2007

[A-2]
M. Takata, S. Kondoh, T. Sakaguchi, H. Choi, J. C. Shim, H. Kurino, and M.
"New nonvolatile memory with extremely high density metal nano-dots"
IEDM Tech. Dig., pp. 553–556,2003

[A-3]
C. Lee, A. Gorur-Seetharam, and E. C. Kan
"Operational and reliability comparison of discrete-storage nonvolatile memories: Advantages of single- and double-layer metal NCs"
IEDM Tech. Dig., 2003, pp. 557–560,2003

[A-4]
Z. Liu, C. Lee, V. Narayanan, G. Pei, and E. C. Kan
"Metal NC memories-Part 1: Device design and fabrication"
IEEE Trans. Electron Devices, vol. 49, pp. 1606–1613,2002

[A-5]
Han-Joo Kim, Soo-Gil Park
" Development of aqueous polymeric gel electrolyte for pseudo capacitor"
San 48, Kaeshindong, Heungdukgu, Cheongju, Chungbuk 361-763, Korea

[A-6]
Chungho Lee, Jami Meteer, Venkat Narayanan Edwin C. Kan "Self-assembly of metal nanocrystals on ultrathin oxide for nonvolatile memory applications"
Journal of Electronic Materials, volume 34. number 1,2005


[A-7]
C. Louro, A. Cavaleiro, and F. Montemor,
"How is the chemical bonding of W-Si-N sputtered coatings? "
Surface and Coatings Technology 142-144 pp.964-970,2001


Addendum B

[B-1]
Sugizaki, T. Kobayashi, M. Ishidao, M. Minakata, H. Yamaguchi, M. Tamura, Y. Sugiyama, Y. Nakanishi, T. Tanaka, H.
"Novel multi-bit SONOS type flash memory using a high-k charge trapping layer"
VLSI Technology, 2003. Digest of Technical Papers. 2003 Symposium on,2003

[B-2]
V. A. Gritsenko,K. A. Nasyrov, Yu. N. Novikov, A. L. Aseev, S. Y. Yoon, Jo-Won Lee, E. -H. Lee and C. W. Kim
"A new low voltage fast SONOS memory with high-k dielectric"
Solid-State Electronics Volume 47, Issue 10, Pages 1651-1656 ,Oct. 2003

[B-3]
T. Sugizaki, M. Kohayashi, M. Ishidao, H. Minakata, M. Yamaguchi, Y. Tamura, Y. Sugiyama, T. Nakanishi, and H. Tanaka
"Novel Multi-bit SONOS Type Flash Memory Using a Highk Charge Trapping Layer"
Symposium on VLSl Technology Digest of Technical Papers,2003

[B-4]
Chungho Lee, Jami Meteer, Venkat Narayanan Edwin C. Kan "Self-assembly of metal nanocrystals on ultrathin oxide for nonvolatile memory applications"
Journal of Electronic Materials, volume 34. number 1,2005

[B-5]
Patterson, T. A., Carver, J. C., Leyden Leyden, D. E., Hercules, D. M
"A Surface Study of Cobalt-Molybdena-Alumina Catalysts Using X-Ray Photoelectron Spectroscopy"
Department of Chemistry, University of Georgia, Athens, Georgia 30602 ,1976

[B-6]
McIntyre N.S. Cook M.G
"X-Ray Photoelectron Studies on Some Oxides and Hydroxides of Cobalt, Nickel, and Copper"
Anal. Chem. 47, 2208 ,1975

[B-7]
T.P. Yadav, N.K. Mukhopadhyay, R.S.Tiwari, O.N.Srivastava
"Synthesis of nanocrystalline (Co,Ni)Al2O4 spinel powder by mechanical milling of quasicrystalline material"
Materials Science. Accepted In JNN,2006

[B-8]
Paolo Gazzana, Priaroggia, Piazza S,Ambrogio
"Use of barium copper oxide compounds as high critical temperature (Al2CoO4) "
Related U.S. applicationData,1993

[B-9]
Y. F. Tian, Y. P. Zhang, Shi-shen Yan,G. L. Liu, Y. X. Chen, and L. M. Mei,G. Ji and Z. Zhang
"electrical transport properties of (CoXAl1-X)2O3-V oxide magnetic semiconductor and corresponding Co-Al2O3 granlar films"
Appl. Phys. Lett. 91, 013509,2007