臺灣博碩士論文加值系統

本研究的目的是要開發及運用”回歸型最簡類化型小腦模型控制器”(Recurrent S_CMAC_GBF)來增進差分式全球衛星定位系統(Differential-Global Positioning System)之精準度，並使其以FPGA晶片來實現及測試。本文呈現以Recurrent S_CMAC_GBF 增進GPS更精準的定位，我們使用低成本的商業模組(Trimble Lassen)改善其DGPS定位誤差，並且讓昂貴的商業模組(Trimble 5700)接收器的定位精準度做進一步的提昇。本文所提出的方法是搜集參考點與接收器之間的誤差資訊，運用Recurrent S_CMAC_GBF預測未來的誤差趨勢，並回饋至接收器本身做誤差校正，藉以改善並提升衛星接收器定位的準確度。最後使用以Recurrent S_CMAC_GBF為架構之FPGA硬體測試結果，並由RS-232將資料回傳至電腦驗證之。

This study is to design the structure of Recurrent S_CMAC_GBF use for improve in DGPS (Differential-Global Positioning System) accuracy, and to implement and test the hardware structure by using FPGA chip. This paper present the Recurrent S_CMAC_GBF in DGPS to increase for accurate positioning. We used a low cost commercial module (Trimble Lassen) to improvement the DGPS system and used the expensive commercial module (Trimble 5700) receiver to further. The proposed project is collects erroneous information and use Recurrent S_CMAC_GBF to predicted future erroneous tendency. This predicted information will be employed to improve the accuracy of DGPS. Finally, the FPGA chip is used implement Recurrent S_CMAC_GBF hardware structure, the result will be translated to computer by RS-232 to verify.

目錄
中文摘要 i
英文摘要 ii
誌謝 iii
目錄 iv
表目錄 vii
圖目錄 viii
第一章 緒論 1
1.1 研究背景與動機 1
1.2 研究目的 2
1.3 研究方法 3
1.4 論文架構 3
第二章 回歸型最簡定址架構之類化型小腦模型控制器之介紹 5
2.1 回歸型最簡類化型小腦模型控制器(Recurrent S_CMAC_GBF) 5
2.1.1 架構設計 5
2.1.2 學習方法 8
2.2 Recurrent S_CMAC_GBF之學習能力 9
2.2.1 簡單之時序關聯性例子 9
2.2.2 動態(dynamic)非線性系統 11
2.3 Recurrent S_CMAC_GBF與其他學習方法之比較 12
第三章 全球衛星定位系統 14
3.1 簡介 14
3.2 全球衛星定位系統之原理 15
3.2.1 基本架構 17
3.2.2 基本觀測量 18
3.2.3 載波電碼 20
3.2.4 最小平方法 22
3.2.5 全球衛星定位系統之計算 24
3.3 差分式衛星定位系統之原理 26
3.4 全球衛星定位系統誤差探討 27
3.4.1 自然環境誤差 27
3.4.2 人為因素誤差 29
3.5 結語 31
第四章 運用Recurrent S_CMAC_GBF預測及改善DGPS之精準度 32
4.1 硬體測試設備介紹與資料搜集 32
4.1.1 Trimble全球定位接收器介紹 33
4.1.2 設備架設與資料搜集之實作 34
4.2 差分衛星定位系統之誤差預測 40
4.2.1 以Recurrent S_CMAC_GBF為基礎之DGPS誤差預測架構與流程 41
4.2.2 模擬結果 43
4.3 差分衛星定位系統之誤差改善 49
4.3.1 誤差改善架構 49
4.3.2 改善數據比較 49
4.3.3 北、中、南部衛星控制點測試 55
4.4 結語 62
第五章 運用Recurrent S_CMAC_GBF改善DGPS定位誤差之硬體測試 63
5.1 硬體測試設備介紹 63
5.1.1 Stratix II系列之FPGA實驗板 63
5.1.2 硬體測試設備連接 64
5.2 改善DGPS定位誤差之硬體架構與測試 65
5.2.1 基本架構 66
5.2.2 硬體模組之詳細步驟說明 68
5.2.3 軟體模擬與硬體測試比較 73
5.3 結語 77
第六章 結論 78
6.1 研究成果 78
6.2 研究問題與解決方法 78
6.3 研究心得 79
6.4 未來展望 80
參考文獻 81
附錄 85
簡歷 89

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