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研究生:王來輝
研究生(外文):Wang Lai-Huei
論文名稱:數位電視廣播接收機之高速環境下同步問題之設計
論文名稱(外文):The Design of Synchronization Algorithms for High-mobility Digital Video Broadcast Receivers
指導教授:紀翔峰
指導教授(外文):Hsiang-Feng Chi
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電信工程系所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2005
畢業學年度:93
語文別:英文
論文頁數:119
中文關鍵詞:正交分頻多工系統取樣頻率偏移同步數位電視廣播系統都卜勒效應
外文關鍵詞:OFDMsynchronizationsampling clock frequency offsetDoppler effectDVB-T
相關次數:
  • 被引用被引用:1
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  • 下載下載:26
  • 收藏至我的研究室書目清單書目收藏:1
近年來,正交分頻多工系統(OFDM)在寛頻通訊應用上愈來愈普及。然而,相較於單載波系統,OFDM系統對於同步問題相當敏感。由於傳送端與接收端振盪器的不完全相同,因此會有取樣頻率偏移的現象,進而導致ICI與ISI的問題。此外,若考慮無線傳輸中,接收端與傳輸端的相對速度不為零,此時會產生都卜勒效應,而使得同步的維持更為困難。本論文中,我們主要探討OFDM系統同步的問題,並以數位電視廣播系統(DVB-T)為討論的平台。DVB-T同步問題的解決方法,已在很多文獻中提出過。然而,大部份都是針對無相對速度或低相對速度下的同步的解決方法。在本篇論文中,為了克服在高速移動下,都卜勒效應所帶來的問題,我們提出了一個新的同步問題的解決方法。之後,我們也將藉由電腦模擬,證明我們提出的方法在高速移動下,仍有很好的效能。
In recent years, OFDM becomes popular for broadband communications. However, compared to single carrier systems, OFDM system is very sensitive to the synchronization problem. The mismatch of crystal oscillators between the transmitter and the receiver circuitry causes the sampling clock frequency offset and will introduce ICI and ISI. Furthermore, if the mobile wireless transmission is considered, the synchronization maintenance will become more difficult because of the Doppler effect. The main topic of this thesis is to discuss the synchronization problems of OFDM systems. DVB-T is selected as the system platform for discuss here. Many synchronization algorithms had been proposed and are applied successfully in DVB-T demodulators. However, most of them can operate properly for stationary wireless and low-mobility receiving. To combat the severe Doppler effect in high-mobility environment, effective synchronization algorithms are necessary. Therefore, the synchronization algorithm in high-mobility environment is mainly concerned in this thesis. We propose an innovative synchronization algorithm, which is shown almost not to be affected by the effect caused by high mobility.
Contents

Chapter 1 1
Introduction 1

Chapter 2 4
OFDM and DVB-T Overview 4
2.1 OFDM Overview 4
2.1.1 Principle of OFDM Transmission 4
2.1.2 Guard Time and Cyclic Prefix (CP) 8
2.2 DVB-T Overview 11
2.2.1 System Overview 11
2.2.2 Signal Expression and Frame Structure 14
2.2.3 Reference Signals 16
2.2.4 Receiver Structure 19

Chapter 3 21
Signal and Channel Model 21
3.1 OFDM Signal Model 21
3.2 Effect of Non-ideal Synchronization 24
3.3 Channel Model 26
3.3.1 Multipath Channel Model 27
3.3.2 Jakes Fading Model 29
3.3.3 COST207 Channel Model 35

Chapter 4 37
Sampling Clock Synchronization 37
4.1 Effect of Sampling Clock Error 37
4.2 The Approach for Sampling Clock Synchronization 39
4.3 Post-FFT Sampling Clock Error Detection (SCED) 42
4.3.1 Synchronization Problem in a Fast-fading Channel 46
4.4 Proposed Pre-FFT SCED 48
4.5 Sampling Clock Error Compensation (SCEC) 52
4.5.1 Lagrange Interpolation 54
4.5.2 B-spline Interpolation 57
4.6 Simulation Results and Analysis 68
4.6.1 Cubic Lagrange and B-spline Interpolator 69

Chapter 5 86
Symbol Synchronization, Carrier Synchronization, and Channel Estimation 86
5.1 Symbol Synchronization 86
5.2 Carrier Frequency Synchronization 89
5.2.1 Pre-FFT Coarse Carrier Synchronization 89
5.2.2 Post-FFT Integer Carrier Synchronization 90
5.2.3 Fine Carrier Synchronization 93
5.2.4 Performance Analysis 94
5.3 Channel Estimation 98
5.3.1 Interpolation in Frequency Direction 100
5.3.2 Interpolation in Time Direction 101
5.3.3 Interpolation Methods 102

Chapter 6 104
Processing Flow and Performance Evaluation of Inner Receiver 104
6.1 Processing Flow of Inner Receiver 104
6.2 Performance of Inner Receiver 106

Chapter 7 114
Conclusion and Future Work 114

Bibliography 116




List of Figures

Figure 2-1 bandwidth diagrams for multicarrier modulation 5
Figure 2-2 OFDM analog modulator 6
Figure 2-3 OFDM signal spectra 7
Figure 2-4 an OFDM digital modulator 7
Figure 2-5 an OFDM analog demodulator 8
Figure 2-6 an OFDM digital demodulator 8
Figure 2-7 ISI problem in OFDM (a) without guard time (b) with guard time 9
Figure 2-8 ICI problem caused by a blank guard time 10
Figure 2-9 cyclic extension in guard time 10
Figure 2-10 ICI elimination by cyclic extension in guard time 11
Figure 2-11 DVB-T system block diagram 12
Figure 2-12 (a) hierarchical 16-QAM mappings withα= 1 13
Figure 2-12 (b) hierarchical 16-QAM mappings withα= 2 14
Figure 2-13 the location diagram of scattered pilots 17
Figure 2-14 the location diagram of continual pilots 18
Figure 2-15 DVB-T receiver block diagram 20
Figure 3-1 baseband OFDM system block diagram (a) transmittor (b) receiver 22
Figure 3-2 multipath environment diagram 27
Figure 3-3 multipath Rayleigh fading channel model 28
Figure 3-4 path arrival angles 30
Figure 3-5 modified path arrival angles 32
Figure 3-7 (a) channel power variation at a velocity of 100 km/hr 34
Figure 3-7 (b) channel power variation at a velocity of 200 km/hr 34
Figure 3-7 (c) channel power variation at a velocity of 300 km/hr 35
Figure 3-8 power delay profiles for COST207 channels 36
Figure 4-1 the accumulation of sampling clock error 38
Figure 4-2 window drift of OFDM symbol 39
Figure 4-3 (a) a synchronized sampling system 41
Figure 4-3 (b) a non-synchronized sampling system with Rotor 41
Figure 4-3 (c) a non-synchronized sampling system with digital resample 41
Figure 4-4 fitting line of φk 44
Figure 4-5 (a) the variation of the phase of channel response for 500th subcarrier with a velocity of 100 km/hr 47
Figure 4-5 (b) the variation of the phase of channel response for 500th subcarrier with a velocity of 200 km/hr 47
Figure 4-5 (c) the variation of the phase of channel response for 500th subcarrier with a velocity of 300 km/hr 48
Figure 4-6 (a) timing diagram for samples in one OFDM symbol 49
Figure 4-6 (b) timing diagram for the Nth samples 50
Figure 4-7 first order deviation using B-spline 51
Figure 4-8 the guard interval with ISI effect 52
Figure 4-9 resample block diagram (a) a concept diagram (b) an equivalent model 52
Figure 4-10 relation of timing indices for resample 53
Figure 4-11 the structure of cubic Lagrange interpolator with Farrow structure 57
Figure 4-12 convolving relation among B-splines with order 0~3 59
Figure 4-13 discrete B-splines of (a) order 0 (b) order 1 (c) order 2 (d) order 3 61
Figure 4-14 direct transform of B-spline 63
Figure 4-15 discrete B-spline samples with a interpolation distance d 64
(a) order = 1 (b) order = 3 65
Figure 4-16 the structure of B-spline interpolation 65
Figure 4-17 the structure of B-spline interpolation with Farrow structure 66
Figure 4-18 the structure of cubic B-spline interpolation with Farrow structure 67
Figure 4-19 the structure for LMS-based FIR prefilter 68
Figure 4-20 simulation model for comparison of cubic B-spline and Lagrange interpolators 70
Figure 4-21 (a) SER performance of cubic B-spline interpolator with a N-tap direct-truncated prefilter 71
Figure 4-21 (b) SER performance of cubic B-spline interpolator with a N-tap LMS-based prefilter 72
Figure 4-21 (c) SER performance of 5th-order B-spline interpolator with a N-tap direct-truncated prefilter 72
Figure 4-21 (d) SER performance of 5th-order B-spline interpolator with a N-tap LMS-based prefilter 73
Figure 4-22 (d) SER performance comparison of cubic and 5th-order B-spline interpolators 74
Figure 4-23 the simulation model for clock synchronization 77
Figure 4-24 (a) post-FFT tracking diagram of a clock offset 100 ppm in a static environment 78
Figure 4-24 (b) post-FFT tracking diagram of a clock offset 100 ppm with a velocity of 100 km/hr 78
Figure 4-24 (c) post-FFT tracking diagram of a clock offset 100 ppm with a velocity of 200 km/hr 79
Figure 4-24 (d) post-FFT tracking diagram of a clock offset 100 ppm with a velocity of 300 km/hr 79
Figure 4-25 (a) proposed pre-FFT tracking diagram of a clock offset 100 ppm in a static environment 80
Figure 4-25 (b) proposed pre-FFT tracking diagram of a clock offset 100 ppm with a velocity of 100 km/hr 81
Figure 4-25 (c) proposed pre-FFT tracking diagram of a clock offset 100 ppm with a velocity of 200 km/hr 81
Figure 4-25 (d) proposed pre-FFT tracking diagram of a clock offset 100 ppm with a velocity of 300 km/hr 82
Figure 4-26 (a) tracking performance comparison in a static environment 83
Figure 4-26 (b) tracking performance comparison under a velocity of 100 km/hr 84
Figure 4-26 (c) tracking performance comparison under a velocity of 200 km/hr 84
Figure 4-26 (d) tracking performance comparison under a velocity of 300 km/hr 85
Figure 5-1 cyclic property of guard interval 87
Figure 5-2 guard interval with ISI effect 88
Figure 5-3 frequency shift due to a carrier offset 91
Figure 5-4 tracking loop for carrier offset 94
Figure 5-5 (a) performance of carrier synchronization in a static environment 96
Figure 5-5 (b) performance of carrier synchronization with a velocity of 100 km/hr 97
Figure 5-5 (c) performance of carrier synchronization with a velocity of 200 km/hr 97
Figure 5-5 (d) performance of carrier synchronization with a velocity of 300km/hr 98
Figure 5-6 the location of available channel response by scattered pilots 99
Figure 5-7 effect in time domain for sampled channel response 101
Figure 5-8 the location of available channel response by interpolation in time direction 101
Figure 6-1 processing flow of inner receiver 106
Figure 6-2 simulation model for inner receiver 108
Figure 6-3 (a) BER of the TD-scheme inner receiver (cubic interpolator) for QPSK 110
Figure 6-3 (b) BER of the FD-scheme inner receiver (cubic interpolator) for QPSK 110
Figure 6-4 (a) BER of the TD-scheme inner receiver (cubic interpolator) for 16 QAM 111
Figure 6-4 (b) BER of the FD-scheme inner receiver (cubic interpolator) for 16QAM 111
Figure 6-5 (a) BER of the TD-scheme inner receiver (5th interpolator) for QPSK 112
Figure 6-5 (b) BER of the FD-scheme inner receiver (5th interpolator) for QPSK 112
Figure 6-6 (a) BER of the TD-scheme inner receiver (5th interpolator) for 16 QAM 113
Figure 6-6 (b) BER of the FD-scheme inner receiver (5th interpolator) for 16 QAM 113






List of Tables

Table 2-1 OFDM parameter in DVB-T 16
Table 4-1 z transforms of discrete B-spline and its shift version 61
Table 4-2 simulation parameters for clock synchronization 76
Table 5-1 simulation parameters for carrier synchronization 95
Table 6-1 simulation parameters for inner receiver 107
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