臺灣博碩士論文加值系統

異質系統架構是一個緊密地結合了中央處理器與多種類加速處理器的開放工業標準，而且支持廣泛資料平行的程式模型。雖然，現今已經有與異質系統架構相容的硬體不過並不是完全的支援。而且大多數運用異質系統架構的軟體都還在開發中，於此時提供一個可驗證程式與工具列的模擬環境是非常有幫助的。
本文在這裡提出一個支援OpenCL 2.0版本的異質運算架構模擬器，是基於異質計算模擬器框架的系統模擬器。該模擬器提供了支援OpenCL 2.0新特性並能結合異質系統的系統模擬器，以異質系統架構的Shared Virtual Memory來支援OpenCL 2.0相同的特性，並額外提供Generic Address Space、Device Enqueue、Pipe、C11 atomic幾項OpenCL 2.0規範的特性，以利程式開發者能透過撰寫OpenCL的程式來對程式在異質系統架構上是否有利來進行驗證。在我們初步的實驗中，該模擬器已經能夠通過以上特性的基準測試，可以幫助開發人員驗證程式結果與程式效能。

Heterogeneous System Architecture (HSA) is an open industry standard that tightly coupled the CPU with variety accelerators and also designed to support data-parallel programming models. Although there is a HSA-compatible machine, it is still not the HSA fully supported machine. A lot of software components using HSA is in development, so it is useful by providing an emulation environment for verifying HSA software components and tool-chains
In this paper, we introduce a HSA emulation platform that can support OpenCL 2.0, which is based on HSAemu framework. HSA emulation platform provides a plat-form that combines OpenCL 2.0 with Heterogeneous System Architecture, using Shared Virtual Memory in HSA to achieve the same feature in OpenCL 2.0, and sup-ply with other new features such as Generic Address Space, Device Enqueue, Pipe, C11 atomic. Programmers can verify whether the program written in OpenCL can leverage the Heterogeneous System Architecture. In our preliminary experiments, the HSAemu has been validated by those extra features mentioned above. It can help developers to verify the program results and performances.

Chapter 1 Introduction 1
Chapter 2 Related Work 4
Chapter 3 Architecture 6
3.1 CPU Simulation Module 7
3.2 GPU Task Dispatcher 8
3.3 GPU Simulators 8
3.4 GPU Helper Functions 9
Chapter4 Improvement 10
4.1 Floating Pointer Exception Handler 10
4.1.1 Specifications and Strategies 10
4.1.2 Implementation on Emulation Platform 12
4.2 Cache Coherence Profiling 13
4.2.1 Specifications 13
4.2.2 Design of CPU and GPU Share Cache 14
CHAPTER 5 OpenCL 2.0 Hardware Implementation 16
5.1 Shared Virtual Memory 17
5.2 Generic Address Space 18
5.3 Atomic C11 19
5.4 Device Enqueue 20
5.5 Pipe 23
Chapter 6 Experiment and Result 24
6.1 Benchmarks 24
6.2 Experimental Results 26
Chapter 7 Conclusion and Future Work 30
REFERENCE 31

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