臺灣博碩士論文加值系統

積體電路製程技術進步使得晶片裡的電晶體密度越來越高，總電晶體增加而晶片面積縮小的情況，其功率密度自然的比起以往晶片來得高。這個狀況反應到晶片，自然的就是晶片溫度上升，及系統晶片工作的不穩定。因此系統晶片內植入溫度感測電路，使晶片能自動調控功率消耗變成了重要的議題，而越來越多嵌入式溫度感測電路在系統晶片內部即時的溫度感測。現今嵌入式溫度感測器依電路形式可分為:類比溫度感測電路、延遲線溫度感測電路、全數位環形振盪式溫度感測電路。為了在數位系統晶片內能夠容易被嵌入且兼顧體積小及不同製程間轉換快的特性，本論文採用全數位式環形振盪電路作為溫度感測電路的基礎。雖然環形振盪電路有上述的多項優點，可是它容易受到供應電壓變動影響所引起溫度感測結果誤差大，最終可能造成溫控電路失效。因此，本論的研究重點則在提出一個能抵抗電壓變動的環形振盪電路來感測晶片的溫度。

由本論研究發現，傳統反相器環形振盪電路之振盪頻率受到供應電壓與溫度兩者的影響大。若以這樣的電路作為溫度感測器，我們希望溫度感測出來的頻率變化，能沒有供應電壓變動的影響，可是單從電路的電壓電流分析來看，要使電路將供應電壓與溫度兩者分開，只保留溫度的影響並不顯而易見。文獻上的反相器閂鎖式延遲級組成的環形振盪電路，它電路能較明顯的抑制電壓變動對頻率影響。但它的溫度對頻率的響應也有下降。為了能進一步的抑制電壓變動，且保有一定的溫度感測能力，本論文基於這個架構，從不同方向設計改良了多款電路如:環形振盪電路中在差動延遲級加Power Gated PMOS開關、延遲級與閂鎖電路分別使用不同臨界電壓、及不用的電路連接。再從這些電路模擬結果試著組合出對電壓抑制效果最好的電路，同時還保有對溫度高的敏感度。使用CMOS 90nm 1P9M 1.0V製程電路設計為實例，溫度量測範圍0℃~100℃，溫度敏感度為720KHz/℃，而電壓變動(1.0V±10%)時影響輸出振盪頻率的誤差為1.81%。

The advanced integrated circuit (IC) fabrication process causes growing power density due to higher transistor density and area miniaturization. This phenomenon reflects to chips, the first impact is the increasing temperature, then chip operation becomes unstable. therefore, embeds a temperature sensing circuit to auto-adjust power dissipation has become an important issue, there are more embedded temperature sensors to sense temperature instantly. To keep chip area be small, avoid process effect and be easily embedded on SoC. All- Digital ring oscillator circuit as a basis for temperature sensor in this paper. Although the ring oscillator has lots of advantages as described above, but it is susceptible to supply voltage fluctuations cause temperature sensing result error, temperature sensing may eventually cause failure. In this thesis focus on resistance to voltage fluctuation of ring oscillator.

In this paper we found the traditional oscillator's frequency was affected greatly by supply voltage and temperature. In terms of a temperature sensor, we want the frequency that be measured at changing of the temperature, it can't be affected by supply voltage, but from voltage and current analysis of the circuit's point of view, to separate supply voltage and temperature, leaving only temperature is difficult. Ring oscillator consist of latch circuit at reference paper, it can suppress the voltage fluctuation but its temperature response frequency also decreasing. To suppress voltage fluctuations and maintain a certain temperature sensing capability. This paper based on this circuit configuration from different directions, a variety of circuit design improvements such as: add Power Gated PMOS switch at differential ring oscillator delay stage, differential delay stage and latch circuit using different threshold voltages. From these simulation results and trying to find the circuit configuration has usefully voltage suppression circuit , but also to maintain high sensitivity to temperature. This circuit has implemented at CMOS 90nm 1P9M 1.0V process,temperature operation range is 0℃~100℃, temperature sensitivity is 720KHz/℃ and voltage fluctuation error is 1.81% at 1.0V±10%.

摘要. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i
ABSTRACT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ii
誌謝. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii
目錄. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iv
表目錄. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vi
圖目錄. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii
一、緒論. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 研究動機與目的. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 研究方法. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 研究架構. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
二、CMOS電路之供應電壓變動文獻探討. . . . . . . . . . . . . . . . 3
2.1 電阻式CMOS溫度感測電路系統. . . . . . . . . . . . . . . . . . . . . 3
2.1.1 供應電壓變動影響. . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 差動式環形振盪溫度感測電路. . . . . . . . . . . . . . . . . . . . . . 8
2.3 數位式控制環形振盪電路. . . . . . . . . . . . . . . . . . . . . . . . 10
2.3.1 數位式控制環形振盪電路(一) . . . . . . . . . . . . . . . . . . 10
2.3.2 數位式控制環形振盪電路(二) . . . . . . . . . . . . . . . . . . 12
2.4 CMOS電路架構之電壓變動分析比較. . . . . . . . . . . . . . . . . . 14
三、環形振盪電路之電壓變動分析. . . . . . . . . . . . . . . . . . . . . 15
3.1 一般環形振盪電路. . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.2 差動式環形振盪電路. . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3 NMOS閂鎖差動式環形振盪電路. . . . . . . . . . . . . . . . . . . . . 19
3.4 反相器閂鎖差動式環形振盪電路. . . . . . . . . . . . . . . . . . . . . 23
3.5 電壓敏感度與溫度敏感度. . . . . . . . . . . . . . . . . . . . . . . . 29
四、抗電壓電源變動之溫度感測電路設計. . . . . . . . . . . . . . . . 31
4.1 不同臨界電壓之反相器閂鎖差動式環形振盪電路組合設計. . . . . . 33
4.2 反相器閂鎖差動式環形振盪電路搭配Power Gated PMOS開關設計. 39
4.2.1 反相器閂鎖差動式環形振盪電路型態一. . . . . . . . . . . . . 39
4.2.2 反相器閂鎖差動式環形振盪電路型態二. . . . . . . . . . . . . 42
4.2.3 反相器閂鎖差動式環形振盪電路型態三. . . . . . . . . . . . . 45
4.2.4 反相器閂鎖差動式環形振盪電路型態四. . . . . . . . . . . . . 48
4.3 反相器閂鎖差動式環形振盪電路型態三之延遲級之電晶體尺寸設計. 51
4.4 環形振盪電路的延遲級級數與工作頻段分析. . . . . . . . . . . . . . 54
4.5 溫度補償電路設計. . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
4.6 抗電壓電源變動之溫度感測電路架構. . . . . . . . . . . . . . . . . . 61
五、硬體實現與模擬結果. . . . . . . . . . . . . . . . . . . . . . . . . . . 66
5.1 硬體實現. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
5.2 模擬結果. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
5.3 效能比較. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
六、結論. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
參考文獻. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91

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