臺灣博碩士論文加值系統

隨著積體電路技術進入次微米時代，當元件尺寸縮小時，首先面臨的問題，即為薄膜電晶體中氧化層會因為電子直接穿隧效應，造成元件之漏電流變大，使得薄膜電晶體元件短路，因此在結構中改善氧化層的品質，會直接影響元件的操作特性。另外在未來多媒體產品輕薄化的趨勢下，低溫製備氧化物介電薄膜技術也相對重要，因惟有在低溫下成長，才有可能於可撓性基材(一般皆為高分子材質)上沉積薄膜，以達到未來元件輕薄短小之要求。
本研究係利用感應耦合式電漿化學氣相沉積系統，於矽烷(SiH4)與氧氣(O2)的氣氛下，低溫下沉積二氧化矽(SiO2)薄膜，並改變氣體流量、沉積工作壓力、射頻電漿功率等…，期望能得到高品質之二氧化矽薄膜，並製作成MIS元件，並探討二氧化矽薄膜對元件漏電流與可靠性之影響。實驗結果顯示，在射頻功率高於1250 Watt時，X-ray繞射圖顯示，二氧化矽薄膜只出現(111)面之繞射峰，經過TEM量測顯示，此二氧化矽為單晶形態。經由SEM與AFM分析觀察，二氧化矽薄膜顯微結構平坦，其表面粗糙度在2.1~6.6 nm之間。由傅立葉轉換紅外線光譜分析數據顯示，二氧化矽薄膜內之Si-H鍵結吸收峰，隨著射頻功率的增加而增加。在不同射頻功率下所製備的二氧化矽薄膜所組成之MIS 元件中，以1750 Watt功率所得者的漏電流和可靠度分析表現最佳，當閘極偏壓為1V時，漏電流為8.2×10-8 A/cm2，而崩潰電場可高達15.8 MV/cm。在後續的退火製程的研究結果指出，退火過程使得二氧化矽薄膜的結晶性變好，降低了材料內部之缺陷，當熱處理溫度為700℃時，漏電流密度值可低至4.6×10-9 A/cm2 ，而崩潰電場更可提升為16.2MV/cm。

Scaling down the electric device dimension is an inevitable tendency with each new generation in semiconductor industry. While the dimensions of devices continue to shrink, the thickness of the insulator layer is also reduced. The shrinkage of the oxide thickness increase direct tunneling through the gate dielectric and degrades the gate oxide reliability. For minimizing the gate leakage current, many new technologies are recommended to grow a high quality thin oxide film. The future trend has also turned it into focusing on the mobility and new applications, such as the substitutions of the glass substrates by flexible plastic substrates. Low temperature fabrication of high-quality gate oxide film is one of the key issues for further development of device.
In this work, we report the formation of high-quality SiO2 thin films for the gate dielectric layer by using inductively coupled plasma chemical vapor deposition (ICP-CVD) technique from silane and oxygen gas mixtures at low temperatures. The influences of deposition parameters, including SiH4/O2 ratio、deposition pressure and ICP r.f power were studied. The electrical properties including leakage current density and breakdown voltage of the silicon dioxide are determined from current-voltage (I-V) characteristics of metal- insulator- semiconductor (MIS) devices.
In this study, only the (111) diffraction peak is observed in 34.3 degree, while r.f power is above 1250 Watt. Analysis of the transmission electron microscopic (TEM) diffraction patterns indicates that the SiO2 films are single crystal with high quality. Analysis of the surface of SiO2 films by atomic force microscopy reveals a smooth surface with roughness in the 2.1~6.6 nm range. From the I-V curve it can be seen that the SiO2 thin film has a good electric property as prepared at 1750 Watt. The lowest leakage current of silicon dioxide films at the gate voltage of 1 V is about 8.2×10-8 A/cm2 and the breakdown field can be obtained is 15.8 MV/cm in this study. For improving its electrical characteristics, the post-annealing was proceeding in a conventional furnace tube at high temperatures varied from 300 ℃ to 700 ℃.High temperature annealing is known to increase the film crystallize atom, which can also decrease the defects in the SiO2 thin films. After annealing at 700 ℃, it can be found that the leakage current density is about 4.6×10-9 A/cm2 at the gate voltage of 1 V and the breakdown field is about 16.2 MV/cm

摘 要 I
Abstract III
總目錄 V
表目錄 VII
圖目錄 VIII
第一章 序論 1
1-1 簡介 1
1-2 研究動機 8
第二章 理論基礎與文獻回顧 9
2-1 電漿 9
2-2 感應耦合電漿源系統 　　 13
2-3 氧化薄膜中之缺陷簡介　　　　　　　 16
2-4 二氧化矽文獻回顧　　　　　　　　　 19
第三章 實驗步驟與方法 　　　　　　　　24
3-1實驗流程 　　　　　　　　　　　　　　25
3-2實驗材料　　　　　　　　　　　　　 26
3-3實驗系統 　　　　　　　　　　　　　　27
3-4實驗參數及步驟 　　　　　　　　　　32
3-5後熱處理步驟 　　　　　　　　　　　　33
3-6 MIS元件的製備 　　　　　　　　　　34
3-7量測儀器及分析理論 　　　　　　　　36
3-7-1薄膜測厚儀　　　　　　　　　　　 36
3-7-2薄膜結晶構造　　　　　　　　　　　 36
3-7-3薄膜微結構缺陷 　　　　　　　　　　37
3-7-4薄膜折射率　　　　　　　　　　　　 37
3-7-5薄膜表面鍵結 　　　　　　　　　　37
3-7-6薄膜表面型態 　　　　　　　　　　38
3-7-7介電係數 　　　　　　　　　　　　39
3-7-8 MIS元件電性 　　　　　　　　　　39
第四章 結果與討論 　　　　　　　　　　41
4-1 二氧化矽薄膜沈積參數之研究　　　　 41
4-1-1氣體流量比例之影響　　　　　　　　 41
4-1-2 工作壓力之影響　　　　　　　　　 45
4-1-3 射頻功率之影響 　　　　　　　　　　49
4-2 MIS元件電性之分析　　　　　　　　　 61
4-2-1 介電係數之分析　　　　　　　　　　 61
4-2-2 漏電流之分析 61
4-2-3 崩潰電場之分析 62
4-3 後熱處理之影響 66
第五章 結 論 74
第六章 參考文獻 76
誌 謝 84
作者簡歷 85

[1]黃素真, “液晶顯示器”, 科學發展月刊, 349期, 30-37 (2002).
[2]C. Booth and P. Raynes, “Liquid-Crystal Displays”, Physics
World,pp.33-37 (1997).
[3]葉昆明、陳雲, ”有機電激發光顯示技術”, 科學發展，385期, P59 (2005).
[4]M. Katayama,” TFT-LCD technology”, Thin Solid Films 341 ,140-147
(1999).
[5]G. Mueller, Electroluminescence I-Semiconductor and Semimetals Vol.
64,Academic Press, San Diego, CA USA, 209 (2000).
[6]T. P. Brody, J. A. Asars, and G. D. Dixon, “A 6×6 Inch 20Lines-per-
Inch Liquid-Crystal Display Panel,” IEEE Transactionson Electron
Devices, Vol. ED-20, No. 11, pp. 995-1001 (1973).
[7]P. G. Lecomber, W. E. Spear, and A. Ghaith, “Amorphous-Silicon Field-
Effect Device and Possible Application,” Electronics Letters, Vol.
15, No. 6, pp. 179-181 (1979).
[8]M. Rieth, "Nano-Engineering in Science and Technology: An
Introduction to the World of Nano-Design", World Scientific Pub Co,
p.164 ,(2003).
[9]International Technology Roadmap for Semiconductor, Semiconductor
Industry Associatio, 2005 edition.
[10]J. Maserijian and N. Zamani, “Behavior of the Si/SiO2 interface
observedby Fowler-Nordheim tunneling,” J. Appl. Phys. 53, 559
(1982).
[11]E. Atanassova, D. Spassov and A. Paskaleva ,“Influence of the metal
electrode on the characteristics of thermal Ta2O5 capacitors”,
Microelectronic Engineering, Volume 83, Issue 10, 1918-1926 (2006)
[12]S. Harasek, H. D. Wanzenboeck, E. Bertagnolli, “Compositional and
electrical properties of zirconium dioxide thin films chemically
deposited on silicon”,Journal of Vaccum Science and Technology A 21,
653 (2003) .
[13]W. J. Zhu, T. P. Ma, Fellow IEEE, S. Zafar, and T. Tamagawa, Member,
IEEE,〝Charge trapping in ultrathin hafnium oxide〞, IEEE, 597-599
(2002).
[14]K. L. Ng, N. Zhan, M. C. Poon, C. W. Kok, M. Chan, and H. Wong,
“Electrical characteristics of novel hafnium oxide film”, IEEE, 51-
54 (2002).
[15]B. Chapman, Glow Discharge Processes, John Wiley & Sons, New York, 49
(1980).
[16]羅正忠, 張鼎張, “半導體製程技術導論”, 台灣培生教育出版有限公司,
p269-271 (2002).
[17]施敏(原著), 黃調元譯, “半導體元件物理與製作技術”, 交大出版社,
(2002).
[18]K. Sekine, Y. Saito, M. Hirayama and T. Ohmi, “Highly Robust
Ultrathin Silicon Nitride Films Grown at Low-Temperature by Microwave-
Excitation High-Density Plasma for Giga Scale Integration”, IEEE
Transactions on Electron Devices, Vol. 47, 1370-1374 (2000).
[19]Y. Wu, G. Lucovsky and Y.M. Lee, “The Performance and Reliability of
PMOSFET’s with Ultrathin Silicon Nitride/Oxide Stacked Gate
Dielectrics with Nitrided Si-SiO2 Interfaces Prepared by Remote
Plasma Enhanced CVD and Post-Deposition Rapid Thermal Annealing”,
IEEE Transactions on Electron Devices, Vol. 47, 1361-1369 (2000).
[20]B.C. Lim, Y.J.Choi, J.H.Choi and J. Jang, “Hydrogenated Amorphous
Silicon Thin Film Transistor Fabricated on Plasma Treated Silicon
Nitride”, IEEE Transactions on Electron Devices, Vol. 47, 367-371
(2000).
[21]L. da Silva Zambom, R. Domingues Mansano, R. Furlan, “Silicon
Nitride Deposited by Inductively Coupled Plasma Using Silane
Nitrogen”, Vacuum 65, 213-220 (2002).
[22]A. Goetzberger, E. Klausmann, and M. J. Schulz, “Interface states on
semiconductor/insulator interface”, CRC Critical Reviews in Solid
State and Materials Sciences 6, 1 (1976).
[23]G. DeClerck, “Characterization of surface states at the Si-SiO2
interface”, in Nondestructive Evaluation of Semiconductor Materials
and Devices (J. N. Zemel, ed), Plenum Press, New York, 105-148 (1979).
[24]G. Greeuw, J. F. Verwey, “The mobility of Na+, Li+ and K+ions in
thermal grown SiO2 films”, Journal of Applied Physics 56, 2218
(1984).
[25]Y. Shacham-Diamand, A. Dedhia, D. Hoffstetter, W.G. Oldham, “Copper
transport in thermally SiO2”, Journal of the Electrochemical Society
140, 2427 (1993).
[26]莊達人, VLSI 製造技術, 高立出版社, p378 (2001).
[27]T. Serikawa, and S.Shirai, “Low Temperature Fabrication of High
Mobility Poly-Si TFTs for Large Area LCDs,” IEEE Transactions on
Electron Devices, Vol. 36, No.9, 1929-1933 (1989).
[28]N. D. Young, G. Harkin, R. M. Bunn, D. J. McCulloch, and I. D.
French, “The Fabrication and Characterization of EEPROM Arrays on
Glass Using a Low Temperature Poly-Si TFT Process,” IEEE
Transactions on Electron Devices, Vol. 43, No. 11, 1930-1936 (1996).
[29]A. Marmorstein, and A. T. Voutsas, “A Systematic Study and
Optimization of Parameters Affecting Grain Size and Surface Roughness
in Excimer Laser Annealed Polysilicon Thin Films,” J. Appl. Phys.,
Vol. 82, No. 9, 1(1997).
[30]C. Ho, “Gate Oxide Scaling Limits and Projection,” IEDM., 319-322
(1996).
[31]G. Lucovsky, Y. Wu, H. Niimi, V. Misra, and J. C. Phillips, Appl.
Phys. Lett., 74, 1999 (2005).
[32]K. Fujino, Y. Nishimoto, N. Tokumasu and K. Maeda, “Low Temperature,
Atmospheric Pressure CVD Using Hexamethyldisiloxane and Ozone,” J.
Electrochem. Soc., 139, 2282 (1992).
[33]Z.Yuan, S.. Mokhtari, A. Ferdinand, J. Eakin and L. Bartholomew,
“Optimization of SiO2 film conformality in TEOS/O3 APCVD,” Thin
Solid Films, Vol. 290-291, 422(1996)
[34]F.S Becker, In Reduced Thermal Processing for VLSI., Ed. R. A. Levy,
NATO, ASI, K-87, 86-84 (1990).
[35]F. S. Becker, D. Pawlik, H. Anzinger, A. Spitzer, J. Vac. Sci.
Technol., B. 5, 155 (1987).
[36]B.M.Kemlage, in chemical vapor deposition -8th int. Conf. Ed. J.
Blocher, Jr., G. E. Vuillard, G. Wahl, The Electrochemical Society,
Pennington, U. K. , p. 148 (1981).
[37]T. Matsuyama, N. Terada, T. Baba, T. Sawada, S. Tsuge, K. Wakisaka,
and S. Tsyda, “High-quality Polycrystalline Silicon Thin Film
Prepared by a Solid Phase Crystallization Method,” Journal of Non-
Crystalline Solids, Vol. 198-200, 940-944 (1996).
[38]A. M. Mahajan, L. S. Patil, J. P. Bange and D. K. Gautam, “Growth of
SiO films by TEOS-PECVD system for microelectronics applications ,”
Surface and Coatings Technology, Volume 183, Issues 2-3, 295-300
(2004)
[39]K. F. Albertin, I. Pereyra and M. I. Alayo, “MOS capacitors with
PECVD SiOxNy insulating layer ,” Materials Characterization, Volume
50, Issues 2-3 , Pages 149-154 (2003)
[40]D. S.C, Aydil ES,” Investigation of low temperature SiO2 plasma
enhanced chemical vapor deposition”, Journal of vacuum since &
technology B 14( 2), 738-743 (1996).
[41]T. K. S. Wong, B. Liu, B. Narayanan, V. Ligatchev and R. Kumar, ”
Investigation of deposition temperature effect on properties of PECVD
SiOCH low-k films”, Thin Solid Films, Volumes 462-463, Pages 156-160
(2004)
[42]H. Lorenz, I. Eisele, J. Ramm, J. Edlinger, M. Buhler,
“Characterization of low temperature SiO2 and Si3N4 films deposited
by plasma enhanced evaporation”, Journal of vacuum science &
technology B 9 (2), 208-214 Part 1 (1991).
[43]I. Avigal, Solid State Technol., 26 (10) , 217 (1983).
[44]J.E. Tong and K. Schertenluib, and Carpio, R. A., Solid State
Technol., 27(1), 161 (1984).
[45]J. Batey and E. Tierney, J. Appl. Phy., 60, 3136 (1986).
[46]U. Machens and U. Merkt, “Plasma Enhanced Chemical Vapor Deposition
of Metal- Oxide- Semiconductor Structure on InSb”, Thin Solid Films,
97, 53 (1982).
[47]F. Fracassi, R. d’Agostino, and P. Favia, “Plasma Enhanced Chemical
Vapor Deposition of Organosilicon Thin films From Tetraethoxy-silane-
Oxygen Feeds”, J. Electrochem. Soc. 139,2636 (1992).
[48]F. Templier, L. Vallier, R. Madar, J.-C. Oberlin, R. A. B. Devine,
Thin Soild Films, 241, 251 (1994).
[49]52. G. Tochitani, M. Shimozuma, H. Tagashira, J. Vac. Sci. Technol.
A. 11, 400 (1993).
[50]K-S Chen, X. Zhang, R. Ghodssi,“ Residual Stress and Failure
Modeling of Thick PECVD Oxide Films for MEMS Application,”第一屆海峽
兩岸微系統研討會會議論文, May, Tainan, Taiwan,pp. 264-269 (2000).
[51]K. Ishikaw, M. Ozawa, C.H. Oh and M. Matsumura,“Excimer-Laser-
Induced Lateral-Growth of Silicon Thin-Films,” Jpn. J. Appl. Phys.
Vol. 37, 731-736 (1998).
[52]G. K. Giust, and T. W. Sigmon, “Laser-Processed Thin-Film
Transistors Fabricated from Sputtered Amorphous-Silicon Films,” IEEE
Transaction on Electron Devices, Vol. 47, No. 1, 207-213 (1998).
[53]W. C. Yeh, “Study of Excimer-Laser-Processed Polycrystalline-Silicon
Thin-Film Solar Cells,” Ph.D. thesis, Department of Physical
Electronics, Tokyo Institute of Technology, Japan,p.90 (2000).
[54]張建宏, “多晶矽薄膜製程之研究” 國立成功大學工程科學研究所碩士論,p90
(2002).
[55]A. Kumagai, K. Ishibashi, Ge. Xu, M. Tanaka, H. Nogami, O. Okada
“High-quality SiO2 film deposition using active reaction by oxygen
radical”, Vacuum 66, 317–322 (2002).
[56]H. Kakinuma, M. Mohri, and T. Tsuruoka, “Mechanism of Low-
Temperature Polycrystalline Silicon Growth from a SiF4/SiH4/H2
Plasma,” J. Appl. Phys, Vol. 77, No. 2, 646-652 (1995).
[57]W. G. Hawkins, “Polycrystalline-Silicon Device Technology for Large-
Area Electronics,” IEEE Transaction on Electron Devices,Vol. ED-33,
No. 4, 477-481 (1986).
[58]T. Matsuyama, N. Terada, T. Baba, T. Sawada, S. Tsuge, K. Wakisaka,
and S. Tsyda, “High-quality Polycrystalline Silicon Thin Film
Prepared by a Solid Phase Crystallization Method,” Journal of Non-
Crystalline Solids, Vol. 198-200, 940-944 (1996).
[59]W. C. Yeh, “Study of Excimer-Laser-Processed Polycrystalline-Silicon
Thin-Film Solar Cells,” Ph.D. thesis, Department of Physical
Electronics, Tokyo Institute of Technology, Japan, p.120 (2000).
[60]Y. Hatanaka, K. Sano, T. Aoki, A. M. Wrobel, “Experiments and
analyses of SiC thin film deposition from organo-silicon by a remote
plasma method ”, Thin Solid Films 368, 287-291（2000）.
[61]S. K. Kim, Y. J. Choi, K. S. Cho and J. Jang,“Coplanar Amorphous
Silicon Thin Film Transistor Fabricated by Inductively Coupled Plasma
Chemical Vapor Deposition”, J. Appl. Phys., Vol. 84, 4006-4012
(1998).
[62]S. K. Kim, Y. J. Choi, K. S. Cho and J. Jang,“Hydrogen Dilution
Effect on the Properties of Coplanar Amorphous Silicon Thin-Film
Transistors Fabricated by Inductively-Coupled Plasma CVD”, IEEE
Transactions on Electron Devices, Vol. 46, 1001-1006 (1999).
[63]Y. W. Choi, S. W. Park and B. T. Ahn, “Effects of Inductively
Coupled Plasma Oxidation on the Properties of Polycrystalline Silicon
Films and Thin Film Transistors”, Appl. Phys. Lett. Vol. 74, 2693-
2695 (1999).
[64]J. W. Lee, K. D. Mackenzie, D. Johnson, J. N. Sasserath, S.J. Pearton
and F. Ren, “Low Temperature Silicon Nitride and Silicon Dioxide
Film Processing by Inductively Coupled Plasma Chemical Vapor
Deposition”, J. of the Elect. Sci. 147, 1481-1486 (2000).
[65]S. Rojas, A. Modelli, W.S. Wu, A. Borghesi, B. Pivac, J. Vac. Sci.
Technol. B 8,1177 (1990).
[66]J. A. Borders, S. T. Picrauxi, and W. Beezhld, Appl. Phys. Lett., 18,
509 (1971).
[67]P. R. McCurdy, J. M. Truitt, and E. R. Fisher, J. Vac. Sci.
Technol.,A17, 883 (1989).
[68]K. M. Krishna, H. Ebisu, K. Hagimoto, Y. Hayashi, T. Soga, T. Jimbo,
and M. Umeno, “Low density of defect states in hydrogenated
amorphous carbon thin films grown by plasma-enhanced chemical vapor
deposition”, Appl. Phys. Lett., Vol. 78, No. 3, 294~296 (2001).