臺灣博碩士論文加值系統

深度卷積神經網路的相關研究已經進行多年，並且在電腦視覺的領域得到驚人的成果，相關的應用也使我們的生活更加便利和直覺，然而先進的深度卷積神經網路通常包含百萬等級的參數和十億等級的算術運算，這使深度卷積神經網路無法有效率的在行動裝置和嵌入式系統中使用。

在這篇論文中，我們呈現一個深度卷積神經網路的特殊應用積體電路(ASIC)架構設計，目標是需要即時計算和低功率消耗的應用，在深度卷積神經網路的架構設計中有兩個主要的挑戰，第一個是在運算過程中需要大量的記憶體存取，第二個是由於資料分布和精準度不同的特性，會造成運算中產生不必要的功率消耗，因此降低記憶體的讀取和有效率的算術運算是架構設計的重點。

我們透過系統化的方法分析深度卷積神經網路中每一層所適合的資料重複使用型式，並且使用最佳的重複利用資料型式來降低記憶體存取的次數，我們也提出一個基於有符號數處理(sign and magnitude)的乘積累加運算(MAC)實作方法，並且驗證這種設計方法相比於傳統二補數的設計方法可以達到更低的功率消耗。

Abstract ix
1 Introduction 1
1.1 The Applications of Deep Convolutional Neural Networks . . 1
1.2 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.3 Thesis Organization . . . . . . . . . . . . . . . . . . . . . . . 4
2 Background 5
2.1 Machine Learning Overview . . . . . . . . . . . . . . . . . . 5
2.2 Neural Networks . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2.1 Modeling a neural . . . . . . . . . . . . . . . . . . . . 7
2.2.2 Backpropagation Algorithm . . . . . . . . . . . . . . 9
2.2.3 Deep Learning . . . . . . . . . . . . . . . . . . . . . . 9
3 Convolutional Neural Network 13
3.1 Overview and Core Concepts . . . . . . . . . . . . . . . . . . 13
3.2 Important Features . . . . . . . . . . . . . . . . . . . . . . . 13
3.3 Building Blocks . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.4 Popular Convolutional Neural Network Model . . . . . . . . 19
4 Architecture Design and Implementation of CNN Acceler-
ator 23
4.1 Design Challenges and Considerations . . . . . . . . . . . . . 23
4.2 Proposed Hardware Architecture . . . . . . . . . . . . . . . 24
4.2.1 Reduce DRAM Access . . . . . . . . . . . . . . . . . 27
4.2.2 Filter Adapted Data
ow . . . . . . . . . . . . . . . . 35
4.2.3 Energy Efficient Multiplier-Accumulator . . . . . . . 42
4.2.4 Architecture and Design Features . . . . . . . . . . . 43
4.2.5 Synthesis Results and Comparosion . . . . . . . . . . 46
5 Conclusion 49
Bibliography 50

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