臺灣博碩士論文加值系統

本論文描述一個2.5V，1.5GHz的CMOS 射頻接收器前端電路設計，主要應用於數位音訊廣播系統。射頻接收器前端電路包含雙端平衡式低雜訊放大器、正交相位向下移頻混波器、本地震盪器正交相位產生器、本地震盪器輸入緩衝器、中頻增益級、polyphase 濾波器和輸出緩衝器，所有電路合併成單一CMOS IC。由於使用polyphase鏡像排除架構、CMOS射頻電路和晶片內濾波功能，此接收器可全部積體化並可將常用在超外差式接收器上的外接表面聲波濾波器省略。
在低雜訊放大器方面，我們採用雙端、cascode共源級使用電感source degeneration的形式。使用平面電感當負載可提高增益表現並適用於低電壓的射頻電路使之積體化。配合電流重複使用的架構以及使用限制功率雜訊最佳化技術，整個低雜訊放大器經由模擬可提供29.4 dB的電壓增益，S11為-29.2 dB，功率消耗25mW及雜訊指數約為2.38 dB。在向下移頻混波器方面，採用雙平衡式Gilbert Cell並使用共模回授電路。模擬顯示此混波器可達7.5 dB的conversion gain 和-5 dBV的IIP3。
整個射頻接收器前端電路是使用台積電0.25微米單多晶層五金屬層之混合訊號CMOS製程來設計，並操作在2.5V的電壓。我們的接收器設計中並使用到此製程的spiral電感model及MOS RF model。

This thesis describes the design of a 2.5V 1.5GHz CMOS RF receiver
front-end for Digital Audio Broadcasting(DAB) system. The
receiver front-end combines a balanced low noise amplifer (LNA),
quadrature downconversion mixers, an LO quadrature generator
, LO input buffers, IF gain stages , a polyphase filter,
second gain stages, and output buffers all in one single CMOS
IC. Using polyphase image-reject architecture, CMOS RF
circuits, and on-chip filtering, the receiver is fully
integrated and eliminates off-chip SAW filters often seen in
heterodyne receivers.
Down to the signal path of this front-end design, the low
noise amplifier is a differential, cascode common-source with
inductive source degeneration type. The planar spiral inductor
used in LNA boost the gain performance and enable low voltage RF
circuits to be monolithically integrated. Combined with the
current-reused architecture and power-constrained noise optimization techniques,
the LNA can achieve 29.4dB voltage gain, -29.2dB S11, 25mW power consumption,
and 2.38 dB NF, obtained from simulation. The down-conversion
mixer employs a double balanced Gilbert Cell type mixer with
common mode feedback circuit. Simulation shows it can achieve
7.5dB conversion gain and -5dBV IIP3.
This RF receiver front-end is designed in TSMC 0.25$\mu$m
single-poly, five-metal mixed-signal CMOS process, operated with 2.5V power supply.
The spiral inductor and MOS RF model, from the TSMC process,
are adopted in the receiver design.

Ch.1 Introduction
Ch.2 Radio Receiver Architecture
Ch.3 Fundamentals and Specifications of RF Front End Design for DAB System
Ch.4 Low-Noise Amplification at Radio Frequencies
Ch.5 Mixer
Ch.6 Polyphase Image Reject Receiver
Ch.7 Conclusions and Future works

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