臺灣博碩士論文加值系統

　　一顆特殊應用積體電路（ASIC）之開發，主要包含設計、生產製造以及測試等三個階段。故積體電路之開發從設計、製造一直到產品完成最終測試後，其中每一步驟皆深深地影響到之開發成本，而此元件開發成本日後將反映於系統產品之售價上，進而影響產品在市場之競爭力。例如，元件每增加1元之成本，實際反映至產品之售價上可能達3~4元以上。另方面由於電子產品具有生命周期短、高量產等產業特性，上市時間早或晚往往影響到該產品之獲利多寡，所謂商場如戰場，時間就是金錢，所以開發時程往往成為在產品或元件開發過程中一項重要之考慮因素，有時甚至為了能讓產品能早日上市而採用較昂貴之方式以縮短開發時程，進而獲取較大之利潤。故在新開發－積體電路產品時，一方面除了要考量以最經濟之成本效益，生產符合客戶所要求之品質的產品外，另方面則為了上市時間之考量，而需要縮短製作過程中之時程。
　　在本文中提出一個用於特殊應用積體電路開發之經濟估算，以供使用者能在新發一個積體電路之前，藉由此經濟估算器之分析預先估算所需之開發人力、時程、團隊人員、經費預算及上市時間成本等相關信息以供規畫參考。

　　Cost, quality, and time to market are the basic constraints of any design project. The costs developing a ASIC include design costs, production costs, and test costs. Costs of components are sensitive to competition. For example, changing cost by $1 may change list price by $3~$4. Without understanding the relationship of cost to list price the component designer may not understand the impact on list price of adding, deleting, or replacing components.
　　The feature of eletronic products is high volume and short lifetime. The short lifetimes have made it increasingly important to get new products to market on time. If we are late to market we will have less time to sell our product. As a result we will sell less, we will make less profit and we may also lose market share. Thus, design schedule is a key factor in developing a new product or component. The traditional way of reducing schedules through increase in team size is ineffective an costly. But, sometime we must adopt this way to get new product to market earlier in order to make more profit.
　　In this text we present a economic evaluator to facilitate the prediction of all costs influenced by the ASIC development. The cost model is integrated with a market model to evaluate the influence of a late project. The evaluator is intended for use by ASIC designers and project leaders, and the analysis can help when decisions about design schedule and costs need to be made for a project.