臺灣博碩士論文加值系統

本論文提出一個可調輸出之低EMI數位控制直流-直流轉換器，包含可程式數位ΣΔ參考電壓產生器與完整之數位控制所需之電路，並提出了電阻倍增器概念以及引進隨機脈波位置調變器RPPM、系統控制電路與本文改良之Area-Efficient DPWM概念與Hybrid DPWM所實現的數位dead time最佳化控制。經由以上技術獲得改善其面積、功耗、暫態響應及EMI大小與提升轉換器效率等…好處。本架構以TSMC 0.18um 1P6M 1.8V CMOS製程設計與製造。並且搭配FPGA平台量測與驗證電路功能，證明轉換器在本論文引用RPPM技術下，獲得抑制雜訊能力18dB之幅度。

This paper proposes a digitally controlled low-EMI DC-DC converter with programmable output voltage, which includes programmable digital ΣΔ voltage reference generator and complete circuits of digital control. Concept of resistance multiplier is first introduced in this paper. Random Pulse Position Modulation (RPPM), system control circuit, and dead time optimization control which is accomplished by our improved version of Area-Efficient DPWM and Hybrid DPWM are also introduced in this work. By the technique mentioned above, the area, power consumption, transient response, efficiency, and EMI are thoroughly improved. This work is designed and manufactured in TSMC 0.18um 1P6M 1.8V CMOS process. The architecture is verified and measured by FPGA platform to prove that with RPPM technique, the overall 18dB of noise suppression is achieved.

第一章 緒論 1
1.1 研究背景與動機 1
1.2 相關研究發展 3
1.3 論文架構簡介 7
第二章 數位積體化直流-直流轉換器簡介及原理 8
2.1 降壓型同步轉換器簡介 8
2.1.1直流穩態分析 8
2.1.1.1連續導通模式 9
2.1.1.2不連續導通模式 12
2.1.2交流穩態分析 15
2.1.2.1連續導通模式 15
2.2控制器模式與工作原理 18
2.3類比至數位轉換器(ADC) 20
2.3.1 Window ADC 21
2.3.2 Delay-line ADC 22
2.4數位補償器 26
2.5數位脈波寬度調變器(DPWM) 28
2.5.1 counter-based DPWM 31
2.5.2 Delay line DPWM 32
2.5.3 Hybrid DPWM 34
2.6 數位Dead time最佳化控制 35
第三章 可程式數位ΣΔ參考電壓產生器原理 37
3.1數位ΣΔ調變器 38
3.1.1量化雜訊 38
3.1.2超取樣定理 40
3.1.3雜訊整型器 42
3.1.4一階三角積分調變器 42
3.1.5高階三角積分調變器 44
3.2 RC低通濾波器 45
第四章 隨機脈波位置調變原理 51
4.1假隨機數值產生器PRPG 52
4.2改良版混合式數位脈波寬度調變器(Hybrid DPWM) 54
4.3 Area-Efficient DPWM 58
第五章 系統電路設計與模擬 61
5.1可程式數位ΣΔ參考電壓產生器 63
5.1.1可程式數位ΣΔ參考電壓產生器系統規格決定方法 64
5.1.2數位ΣΔ調變器 65
5.1.3 RC低通濾波器 69
5.2 Delay-line ADC 76
5.3查表式PID數位補償器(使用自行開發之GUI軟體設計) 87
5.4隨機脈波位置調變(RPPM) 89
5.4.1假隨機數值產生器PRPG 91
5.4.2改良版混合式數位脈波寬度調變器(Hybrid DPWM) 92
5.4.3 Area-Efficient DPWM 96
5.5數位dead time最佳化控制 100
5.6系統控制電路 102
第六章 實驗結果 108
6.1可程式數位ΣΔ參考電壓產生器FPGA實作及量測結果 109
6.2降壓型轉換器開迴路結合AEDPWM與PRPG FPGA實作及量測結果 110
6.3數位轉換器閉迴路FPGA實作及量測結果 113
6.4 IC佈局與量測規劃 124
第七章 結論 127
7.1 總結與貢獻 127
7.2 未來研究方向 127
參考文獻 129
附錄:本論文ASSCC會議論文 134

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