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研究生:陳韻如
研究生(外文):Yun-ru Chen
論文名稱:一無電容具部分隔離氧化層與埋藏式電流橋之三閘極單電晶體動態隨機存取記憶體
論文名稱(外文):A Capacitorless Triple-Gate 1T-DRAM with Middle Partial Insulation and Current Bridge
指導教授:林吉聰
指導教授(外文):Jyi-Tsong Lin
學位類別:碩士
校院名稱:國立中山大學
系所名稱:電機工程學系研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2013
畢業學年度:101
語文別:中文
論文頁數:59
中文關鍵詞:單電晶體無電容式動態隨機存取記憶體資料保存時間中間隔離氧化層三閘極電晶體電流橋
外文關鍵詞:Middle Partial Insulation1T-DRAMData Retention TimeTriple-gate MOSFETCurrent Bridge
相關次數:
  • 被引用被引用:0
  • 點閱點閱:334
  • 評分評分:
  • 下載下載:25
  • 收藏至我的研究室書目清單書目收藏:0
在本篇論文中,我們提出了具中間隔離氧化層和電流橋架構之三閘極電晶體(Triple-Gate Middle Partial Insulation, TGMPI ),並應用在無電容式單電晶體動態隨機存取記憶體(Capacitorless One Transistor Dynamic Random Access Memory, 1T-DRAM )。藉由TCAD ISE10.0的模擬確認各個製程參數與元件特性。我們比較TGMPI元件與傳統電流橋(Con. N-bridge)1T-DRAM架構之記憶體性能。首先我們討論元件的記憶體特性,其中TGMPI抬高式中性區結構,明顯地提升了1T-DRAM的可程式規劃視窗(Programming Window),其改善的幅度約為284 %;而在資料保存時間(Data Retention Time)的表現上,因為本體中性區的增加,加上中間隔離氧化層的輔助下,減少接面漏電流且降低電洞逸散機率,在高溫操作下的退化程度為24.1 %,大幅改善傳統元件94.8 %的退化程度。TGMPI 相較於傳統N-bridge具有良好的溫度容忍度。此外,因為TGMPI元件為三閘極架構,此結構對於資料的寫入與抹除速度和功率消耗比起傳統有更優秀的表現,這將對未來1T-DRAM提供一項極佳的解決方案。
In this paper, we propose a novel triple-gate middle partial insulator (TGMPI) with current bridge structure for capacitorless one transistor dynamic random access memory (1T-DRAM) application. We used the TCAD ISE 10.0 tool to simulate memory characteristics, confirm fabrication parameters and device performance. The proposed TGMPI 1T-DRAM has the enlarged neutral body region to assemble carriers which made larger sensing window between data”1” and data”0”. With more holes are assembled in the body, programming is greatly improved up to 284 %. As far as the data retention time is concerned, the characteristics are also compatible with the conventional N-bridge structure in micro second scale. Under high temperature operation circumstances, our proposed TGMPI 1T-DRAM shows great thermal immunity which is required for embedded memory. The data retention time degradation of our proposed TGMPI device is about 24.1 % at 400 K, improved greatly from the conventional one’s 94.8 %. Furthermore, TGMPI also posses excellent operation speed for writing and erasing data because of triple-gate structure, suggesting that the proposed TGMPI can become a promising candidate for future memory application.
第一章 導論 1
1.1 研究背景 1
1.2 動機 5
第二章 操作原理 6
2.1 運用機制 6
2.2 元件操作說明 7
第三章 元件製作 10
3.1 模擬元件 10
3.2 元件實作 12
第四章 研究方法與結果討論 14
4.1 研究方法 14
4.2 記憶體特性探討 16
4.2.1 元件架構說明 16
4.3 可程式規劃視窗 ( Programming Window ) 18
4.4 資料保存時間 (Data Retention Time) 26
4.5 元件操作速度與溫度之影響 28
4.6 元件容忍度 (Endurance) 31
4.7 元件功率消耗 33
4.8 元件實作結果與量測 37
第五章 結論與未來發展 40
5.1 結論 40
5.2 未來發展 41
參考文獻 42
附錄 – 實作檢討與討論 46
論文著述 49
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