臺灣博碩士論文加值系統

自1960年，世界上第一顆電晶體由Bell實驗室的D. Kahng和Martin Atalla首次實作成功。此時電晶體的通道長度還維持在25 微米(μm)，氧化層厚度為100 奈米(nm)。五年後，Intel創辦人之一Gordon Moore提出 “Moore’s Law”，其內容為: 積體電路上可容納的電晶體，約每隔兩年便會增加一倍。並且隨著科技的進步，10奈米的鰭式電晶體(FinFET)已經順利量產並應用至高端電子產品當中。在積體電路的微縮工程上，除了通道長度的微縮工程作為首要關鍵技術以外；調變積體電路中起始電壓(Threshold Voltage, Vth)也是的重要關鍵技術之一。例如，超薄氧化層、通道的離子佈植調製、閘極堆疊調製…等。而在不同的調製手法都將對電晶體的基本電性以及可靠度帶來不一樣的影響。
因此，我們在第一部分主要針對閘極堆疊調製中的金屬退火順序做研究。在此章節，我們研究金屬前/後金屬沉積退火對於二氧化鉿層的影響。並透過基本電性與負偏壓溫度不穩定性（Negative-Bias-Temperature Instability ，NBTI）探討其影響。在初始電性中，最明顯的差異是由閘極材料和半導體之間的功函數差異導致臨界電壓（Vth）的不同。 此外，快速量測的結果顯示，金屬沉積後退火的元件在NBTI後有更嚴重的Vth劣化，這源於HfO2中更多的氮間隙缺陷。並且，透過快速雙掃描量測(Fast I-V Double Sweep)的分析，我們證實了這種現象是由於製作過程中所產生的缺陷所致。
為了更進一步驗證氮間隙缺陷對於元件的影響，在第二部份我們使用快速測量研究不同TiN閘極的氮濃度對HfO2層中間隙陷阱的影響。 在前一章節，我們透過快速量測以及NBTI，發現了氮間隙缺陷的存在。在本章節中，我們可以進一步發現金屬中氮含量越高，並受到熱擴散的影響，使得在二氧化鉿層會存有更多的氮間隙缺陷。在可靠度方面，由於氮間隙缺陷在二氧化鉿層中扮演著電洞捕獲中心的存在。因此，在常溫下進行NBTI時，我們觀察到電晶體劣化的主因大部分是由於電洞捕獲現象，而非傳統Reaction-Diffusion Model所導致的次臨界擺福(Subthreshold Swing，S.S.)下降。並且，透過NBTI前後的快速雙掃描量測，可以發現擁有較多氮間隙缺陷的元件，在劣化後會有較大的遲滯現象。這也代表著二氧化鉿層內部的鍵結受到氮間隙缺陷的影響，更容易斷鍵形成新的電洞捕獲中心。
針對第一與第二部分的氮鍵隙缺陷。在第三部分，我們透過氮化處理個過程，進而消除二氧化鉿層中的氧空位與氮間隙缺陷。根據以往的研究，氧化鉿中的氧空位可以通過擴散氮鈍化，從而提高n-MOSFET的性能和可靠性。另一方面，對於p-MOSFET元件，氮擴散到溝道界面中以產生界面缺陷，導致元件的S.S.退化。但是，當HfO2薄膜中的氮濃度較高時，相對應的會產生更多氮間隙缺陷。這些間隙缺陷位於HfO2中，缺陷能量深度靠近價電帶的位子。因此，當電洞從通道傳輸到柵極時，電洞會被捕獲到氮間隙缺陷中。在這個部份，我們研究了氮化時間的減少和元件的退火時間，以進一步改善氧化鉿層的氮和氧空位鍵合，並減少氮界面缺陷。還研究了不同氮濃度和退火時間對器件性能和可靠性的影響。
最後，在MOSFET技術的演進中，除了在Moore’s Law中演進的電晶體以外，另一個研究的方向則是在於增加功能的多樣性，稱為More than More。在其發展的部分，包含了眾多不同功能的元件，如RF、高壓元件、CMOS image sensor等，此章節我們將討論在silicon-on-insulator(SOI)元件中的異常恢復現象做討論。通過不同的熱載流子劣化（HCD）測量序列可以闡明電洞注入導致異常恢復的行為。 根據HCD結果，通道表面能帶因為電洞注入的關係，能帶下拉並且暫時屏蔽界面缺陷。 此外，不同電壓應力的實驗結果表明，電洞注入的量是由閘極和漏極之間的電場所決定。

Since 1960, the world’s the first metal-oxide-semiconductor-field-effect transistors (MOSFETs) were invented by Kahng and Atalla in Bell Lab. The transistor length is 25 μm, and gate oxide thickness is 100nm. Nowadays, MOSFETs have become the dominant devices for ultra-large-scale integration (ULSI) circuits due to its low cost, power consumption and easy to scale down. In 1965, Gordon Moore, one of Intel''s founders, first proposed Moore’s Law: The number of components per integrated circuit will doubling every year. And with the advancement of technology, the 10 nm fin transistor (fin FET) has been mass-produced and applied to advance electronic products. In the micro-engineering of the integrated circuit, in addition to the miniaturization of the channel length as the primary key technology; the threshold voltage (Vth) in the modulated integrated circuit is also one of the key technologies. For example, ultra-thin oxide layers, ion implantation modulation of channels, gate stack modulation, etc. Different modulation methods will have different effects on the basic electrical properties and reliability of the transistor.
Therefore, in the first part, we mainly study the metal annealing sequence in gate stack modulation. In this section, we study the effect of metal pre/post metal deposition annealing on the cerium oxide layer. In the initial electrical characteristics, the most apparent difference is threshold voltage (Vth) resulting from the work-function difference between the gate material and the semiconductor. Furthermore, fast I-V measurements indicate that the device with post-metal deposition annealing shows more degradation of Vth in NBTI, which originates from the more nitrogen interstitial defects in HfO2. This phenomenon is confirmed to be due to the process-related pre-existing defects by an analysis of double sweep fast I-V measurements.
In order to further verify the effect of nitrogen interstitial defects on the MOSFET, in the second part we used fast I-V measurements to study the effect of different TiN gate nitrogen concentrations on the interstitial defect in the HfO2 layer. In the previous section, we discovered the existence of nitrogen interstitial defects through fast I-V measurement and NBTI. In this part, we can further find that the higher nitrogen content in the metal, and the nitrogen is affected by the thermal diffusion, the more nitrogen interstitial defects will exist in the HfO2 layer. In the reliability, the nitrogen interstitial defect takes the role of the hole trapping center in the HfO2 layer. Therefore, when performing NBTI at room temperature, we observed that the main cause of transistor degradation is mostly due to hole trapping, rather than the decline of Subthreshold Swing (S.S.) caused by the traditional Reaction-Diffusion Model. Moreover, through the fast I-V double sweep measurement after NBTI, it can be found that devices with more nitrogen interstitial defects have a large hysteresis after deterioration. This also means that the bond inside the HfO2 layer is affected by the nitrogen interstitial defect, and it is easier to break the bond to form a new hole capture center.
Therefore, for the nitrogen interstitial defects for the first and second portions. In the third part, we eliminate the oxygen vacancies and nitrogen interstitial defects in the HfO2 layer by different nitridation process. Based on previous studies, the oxygen vacancy in hafnium oxide could be passivated by the diffusion nitrogen, thus, enhancing the performance and reliability of n-MOSFET. On the other hand, as for p-MOSFET device, the nitrogen diffuses into the channel interface to generate interface defects, causing S.S. degradation to the device. However, in the HfO2 thin film, the nitrogen interstitial defect will be generated when the concentration of nitrogen is higher. These interstitial defects are located in HfO2 with the energy level below the mid-gap. Therefore, the holes can be trapped into the nitrogen interstitial defects while they transport from the channel to the gate. This work investigates the reduction of nitridation time and annealing time to device to further verify the hafnium oxide layer of nitrogen and oxygen vacancies bonding to reduce nitrogen interface defects. The influence of different nitrogen concentration and annealing time to device performance and reliability are also investigated.
Finally, In the evolution of MOSFET technology, in addition to the evolution of the transistor in Moore''s Law, another research direction is to increase the diversity of functions, called More than More. In its development, it contains many different functional components, such as RF, high voltage components, CMOS image sensor, etc. In this section we will discuss an abnormal recovery phenomenon induced by hole injection during hot carrier degradation in silicon-on-insulator n-type metal-oxide-semiconductor transistors. How the hole injection induces the abnormal recovery behavior can be clarified by different hot carrier degradation (HCD) measurement sequences. According to this HCD result, the channel surface energy band is drawn down and the interface defect will be temporarily shielded, an effect caused by the trapped hole. Furthermore, results of different stress voltage experiments indicate that the amount of hole injection is determined by the electric field between the gate and drain.

摘要 iii
Abstract vi
Figure Captions xiii
Chapter 1 1
1.1 Basic Background 1
1.1.1 Overview of Moore’s Law, Roadmap of scaling down 1
1.1.2 Overview of high-k/metal gate MOSFETs and FinFETs 3
1.1.3 Overview of Silicon-on-Insulator (SOI) MOSFETs 4
Reference 7
Chapter 2 Parameter Extraction and Measurement Technique 16
2.1 Method of Device Parameter Extraction 16
2.1.1 Determination of threshold voltage (VT) 16
2.1.2 Determination of the subthreshold swing 18
2.1.3 Determination of the low-field effect mobility 19
2.2 Method of Device Parameter Extraction 19
2.2.1 Charge pumping technique 20
2.2.2 Fast I-V Technique 21
Reference 22
Chapter 3 30
3.1 Introduction 31
3.2 Experiment 32
3.3 Result and Discussion 33
3.4 Summary 38
Reference 39
Chapter 4 49
4.1 Introduction 50
4.2 Experiment 51
4.3 Result and Discussion 52
4.4 Summary 58
Reference 60
Chapter 5 71
5.1 Introduction 71
5.2 Experiment 73
5.3 Result and Discussion 74
5.4 Summary 80
Reference 82
Chapter 6 94
6.1 Introduction 94
6.2 Experiment 95
6.3 Result and Discussion 96
6.4 Summary 102
Reference 104
Conclusion 118
Publication List 122
Vita 簡 歷 127

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