臺灣博碩士論文加值系統

本研究使用直接電弧放電方法於低溫下(77 K)沉積奈米晶矽薄膜於玻璃與塑膠基板上，我們使用低電阻值(0.005 Ω/cm)單晶矽晶片作為陰極與陽極之電弧放電電極，並且於致冷溫度下沉積薄膜，以至於本實驗方法可將矽薄膜快速沉積於可撓性塑膠基板之上。
薄膜的特性經由Raman、XRD、TEM與SEM分析，發現薄膜內具有非晶相混和結晶相之結構，以HR-TEM觀測顯示膜內具有許多原子排列非常完整之奈米矽微粒子，並且其為不規則分佈型態。經由調變不同的製程參數對於薄膜的結晶性會產生影響，經由Raman計算，材料內部具有結晶比從0~92 %，由SIMS分析，P-type與N-type雜質可於製程過程中同時被置入薄膜中無需而外的摻雜步驟，因此薄膜式P-N二極體結構可由此方法形成，以至於非常具有潛力應用於薄膜電晶體與太陽能電池。相較於非晶矽薄膜，由文獻說明其奈米晶矽薄膜於長時間光照後具有較佳的穩定性與較高的電子遷移率。目前我們的樣品其光電特性尚未達到預期之水準，推測與薄膜內部之大量缺陷有相關。
電弧放電方法相較於傳統CVD製程，除了設備架設的成本較低外，同時降低了製程汙染環境與危險性的問題。此沉積矽薄膜之方法尚未於文獻收尋中找到相同之研究，且低溫成長矽薄膜之研究近年來引發很大的興趣，因可將其應用於價格低廉之基板，例如玻璃或塑膠基板，以至於本研究非常具有發展的潛力。
關鍵詞:直接電弧放電、塑膠基板、結晶體積比。

Nano-crystalline silicon has been deposited on glass and plastic substrates by direct vacuum arc system at room to cryogenic temperature(77 K). Solid silicon wafer source were amount on both anode and cathode to be the electrodes which were highly doped single crystal silicon wafer(0.005 Ω/cm). It is suitable for deposited thin films on flexible substrate due to low deposition temperature.
Silicon films were characterized by Raman spectroscopy、x-ray diffraction (XRD)、tunneling electron microscope (TEM) and scanning electron microscope (SEM). The result revealed that the crystalline structure embedded in amorphous matrix. High-resolution transmission electron microscopy (HRTEM) was used for direct analyzing the particle where the fully crystallized structure were inert the particles and these particles were random distributed over the substrate. The crystalline volume fraction were calculated from Raman spectrum and it showed the values between 0~92 ％. The impurity concentration was measured by SIMS, that the P-type and N-type impurity was permeated simultaneously into the film during the deposition without additional doping process, thus P-N junction could be achieved.
Nano-crystalline silicon has higher electron mobility and more stability against prolong light exposure than amorphous silicon. According to our research, the opto-electronic effect were not obviously, we assume that a large number of defects existed in the films.
Compared to CVD process, arc discharge system has the advantages of low cost, less environment pollution and non-dangerous of processing. Such research has not yet been observed. Low temperature deposited nano-crystalline silicon thin film has attracted much attention due to applicable on low-cost substrates, like glass and flexible plastic substrate.

Key words: Direct vacuum arc, Flexible substrate, crystalline volume fraction.

第一章 緒論 1
1.1 微電子工業 1
1.2 研究動機 5
第二章 矽元素及矽薄膜之特性與製造 7
2.1 矽特性簡介 7
2.1.1 單晶矽 10
2.1.2 多晶矽 12
2.1.3 非晶矽 15
2.2 化學氣相沉積(Chemical Vapor Deposition, CVD) 16
2.3 物理氣相沉積(Physical Vapor Deposition, PVD) 19
2.4 電弧放電 22
第三章 實驗設備與薄膜鍍製 27
3.1 電弧放電系統 27
3.2 矽晶薄膜之鍍製 32
3.2.1 基板準備 32
3.2.2 電極材料 33
3.2.3 實驗流程 34
3.3 薄膜初步形態觀測 35

第四章 薄膜微結構與特性量測 40
4.1 薄膜結晶性探討 40
4.1.1 製程參數對結晶性之影響 46
4.2 薄膜細部結構觀測 56
4.3 薄膜光電特性量測 61
第五章 結論 72
參考文獻 74

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