臺灣博碩士論文加值系統

在全橋的應用中，全橋相移是最為普遍被使用的架構，其具有柔切的特性，在效率上可以達到很好的表現，特別是在高功率的應用上。但不論二次側使用同步整流還是非同步整流，二次側的整流開關都具有電壓突波現象，因此需提升二次側整流元件的耐壓。本文提出一個新型壓降式緩振電路不只是為了抑制二次側電壓突波，同時也可以取代一次側的箝位二極體，因為其於輕載時溫度容易上升，使得損耗增加。文中提出的壓降式緩振電路將電壓突波的能量儲存至緩振電路的儲能電容上，再利壓降式轉換器的原理，把能量傳送至輸出端，達到能量回收的效果，讓整流開關的電壓應力得以降低，因此可以選用耐壓較低的同步整流開關降低開關導通電阻上的損耗，提升整體電路的效率。
另外本論文將探討緩振電路在不同箝位點上的差異並進行比較，最後再利用模擬軟體和實測波形，來證明壓降式緩振電路箝位在整流開關上的可行性，與效率上的改善。

In the applications of full bridge, phase shift is a most popular architecture. It has an excellent performance on efficiency thanks to soft-switching, especially in high power high voltage applications. However, whether the secondary side uses synchronous rectification or non-synchronous rectification, it will produce the voltage spike on secondary rectifier switches. The voltage spike increases the voltage stress of rectifier switches.
This thesis proposes a new type of buck snubber circuit not only to clamp the voltage spike but also to replace the of clamping diode on the primary side because its temperature will be high in light load and increase the power loss.
The buck snubber stores the energy of voltage spike into the capacitor and transfers the energy to output which makes the spike energy recovery. By the way, the voltage stress on rectifier switches was reduced, the rectifier switches can be changed as lower voltage stress with lower turn-on resistance. The efficiency of the system will also be increased.
In addition, the thesis will compare the difference of clamping point between the rectifier switch and secondary transformer. Finally, the simulation waveform and measure waveform will be used to prove the feasibility of buck snubber and its improvement of efficiency.

摘　要 i
Abstract ii
誌　謝 iv
目　錄 vi
圖索引 viii
表索引 xi
第一章 緒論 1
1.1研究動機與目的 1
1.2論文內容大綱 8
第二章 全橋相移式轉換器架構與原理 10
2.1全橋相移轉換器架構簡介 10
2.2二次側突波電壓分析 13
2.3位二極體應用於全橋相移轉換器 19
1.能量傳送區間(t1 ≤ t < t2) 21
2.箝位區間(t2 ≤ t < t3) 22
3.能量傳送區間(t3 ≤ t < t4) 23
4.第一諧振區間(t4 ≤ t < t5) 23
5.飛輪區間(t5 ≤ t < t6) 24
6.第二諧振區間(t6 ≤ t < t7) 25
8.轉向區間(t7 ≤ t < t8) 26
9.轉向區間(t8 ≤ t < t9) 27
第三章 二次側同步整流壓降式緩振電路分析 29
3.1被動式緩振電路分析 29
3.1.1 RC緩振電路分析 30
3.1.2 RCD緩振電路分析 37
3.2壓降式緩振電路分析 39
1.電壓突波箝位區間(t1 ≤ t < t2) 43
2.電感儲能區間(t2 ≤ t < t3) 46
3.電感釋能區間(t3 ≤ t < t4) 48
4.等待電壓突波區間(t4 ≤ t < t5) 48
3.3緩振電路優缺點比較 49
第四章 二次側同步整流壓降式緩振電路設計 51
4.1壓降式緩振電路設計 52
4.1.1驅動電路設計 52
4.1.2儲能電容設計 53
4.1.3箝位二極體設計 54
4.1.4電感設計 55
4.1.5切換開關設計 56
4.2不同箝位點分析比較 57
4.3模擬軟體驗證結果 63
第五章 實驗數據與結果 66
5.1緩振電路架構與實體圖 66
5.2未加入緩振電路實測波形 67
5.3加入緩振電路實測波形 68
5.4電路效率量測比較 79
5.5電路損耗分析比較 88
第六章 結論與未來展望 93
6.1結論 93
6.2未來展望 94
參考文獻 95

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