臺灣博碩士論文加值系統

本論文提出兩種時域演算法，可萃取高速耦合互連結構的SPICE相容等效寬頻模型。第一種演算法主要針對多導體互連結構，以一傳輸線導向的模型單元串接來合成其等效模型。第二種演算法則是針對差動貫穿孔，探討其等效寬頻π模型，此模型的三個模組分別以最佳化的極點-餘數(pole-residue)的形式表示。配合集總元件萃取技術(SLET)，可將此三模組的極點-餘數分別轉換成相對應的集總電路模型。並在時域與頻域的角度上，分別與全波模擬(3D-FDTD)的結果比較，以驗證所提出的演算法的正確性。

This dissertation proposed two time-domain algorithms for extracting the broadband SPICE-compatible models of high-speed coupled interconnects. The first approach is proposed to synthesized the equivalent models of multi-conductor interconnects by cascading multiple configuration-oriented coupled transmission line (CCTL) units. The second approach focuses on the modeling of differential via based on a broadband macro-π model with three modules represented by the optimum pole-residue forms. Using a systematic lumped-model extraction technique (SLET), all the pole-residue rational functions can transfer into a corresponding lumped model. The accuracy of the two algorithms is demonstrated both in time- and frequency -domain responses comparison with the direct 3D-FDTD simulation.

Contents

Abstract i
Contents iii
List of Figure v
List of Tables x

1 Introduction 1
1.1 Research Motivations 1
1.2 Literature Survey 1
1.3 Contributions 3
1.4 Chapter Outline 5

2 Time-Domain Measurement and FDTD Method 6
2.1 Time-Domain Reflectometry (TDR) Theory 6
2.1.1 One-port measurement 6
2.1.2 Two-port measurement 10
2.1.3 Differential measurement 12
2.2 Finite-Difference Time-Domain (FDTD) Method 15

3 Broad-Band Models Extraction of the Multi-Conductor Coupled Interconnect 21
3.1 Layper Peeling Technique (LPT) 21
3.2 Multi-Dimensional Deconvolution Theory (MDA) 25
3.3 Examples 33
3.3.1 Asymmetric differential pair 33
3.3.2 Symmetric differential pair 37
3.3.3 Three parallel traces 41
3.4 Summary 46

4 Broadband Macro-Models of Differential Via 47
4.1 Simulation and Measurement Setup 47
4.2 Step Responses and Mode Extraction 49
4.3 Synthesis of Equivalent Macro-π Model 50
4.4 Order Reduction 51
4.5 Systematic lumped-model extraction technique (SLET) 52
4.6 Stability and Passivity 55
4.7 Examples 57
4.7.1 Asymmetric Through-Hole Vias 57
4.7.2 Differential Via 65
4.8 Summary 70

5 Conclusion 72


Bibliography 73
Biography 81
Publication List 82

Bibliography

[1]M. K. Iyer, P. V. Ramana, K. Sudharsanam, C.J. Leo, M. Sivakumar, Bryan Lee Sik Pong, and Xie Ling, “Design and development of optoelectronic mixed signal system-on-package (SOP),” IEEE Trans. Advanced Packaging, vol. 27, pp. 278-285, May 2004.
[2]G. S. May, “Intelligent SOP manufacturing,” IEEE Trans. Advanced Packaging, vol. 27, pp. 426-437, May 2004.
[3]R. R. Tummala, “SOP: what is it and why? A new microsystem-integration technology paradigm-Moore''s law for system integration of miniaturized convergent systems of the next decade,” IEEE Trans. Advanced Packaging, vol. 27, pp. 241-249, May 2004.
[4]T. Sudo, H. Sasaki, N. Masuda, and J. L. Drewniak, “Electromagnetic interference (EMI) of system-on-package (SOP),” IEEE Trans. Advanced Packaging, vol. 27, pp. 304-314, May 2004.
[5]R. R. Tummala, M. Swaminathan, M. M. Tentzeris, J. Laskar, G. K. Chang, S. Sitaraman, D. Keezer, D. Guidotti, Z. Huang, K. Lim, L. Wan, S. K. Bhattacharya, V. Sundaram, F. Liu, and P. M. Raj, “The SOP for miniaturized, mixed-signal computing, communication, and consumer systems of the next decade,” IEEE Trans. Advanced Packaging, vol. 27, pp. 250-267, May 2004.
[6]K. F. Becker, E. Jung, A. Ostmann, T. Braun, A. Neumann, R. Aschenbrenner, and H. Reichl, “Stackable system-on-packages with integrated components,” IEEE Trans. Advanced Packaging, vol. 27, pp. 268-277, May 2004.
[7]S. K. Bhattacharya, K. S. Moon, R. R. Tummala, and G. S. May, “Meniscus coating: a low-cost polymer deposition method for system-on-package (SOP) substrates,” IEEE Trans. Electronics Packaging Manufacturing, vol. 26, pp. 110-114, April 2003.
[8]K. Naishadharn, “Experimental equivalent-circuit modeling of SMD inductors for printed circuit applications,” IEEE Trans. Electromagnetic Compatibility, vol. 43, pp. 557-565, Nov. 2001.
[9]P. L. Werner, R. Mittra, and D. H. Werner, “Extraction of equivalent circuits for microstrip components and discontinuities using the genetic algorithm,” IEEE Microwave and Guided Wave Letters, vol. 8, pp. 333-335, Oct. 1998.
[10]D. H. Kwon, J. Kim, K. Kim, S. C. Choi, J. H. Lim, J. H. Park, L. Choi, S. W. Hwang, and S. H. Lee, “Characterization and modeling of a new via structure in multilayered printed circuit boards,” IEEE Trans. Components and Packaging Technologies, vol. 26, pp. 483-489, June 2003.
[11]F. Jun, J. L. Drewniak, and J. L. Knighten, “Lumped-circuit model extraction for vias in multilayer substrates,” IEEE Trans. Electromagnetic Compatibility, vol. 45, pp. 272 - 280, May 2003.
[12]J. G. Yook, L. P. B. Katehi, K. A. Sakallah, R. S. Martin, L. Huang, and T. A. Schreyer, “Application of system-level EM modeling to high-speed digital IC packages and PCBs,” IEEE Trans. Microwave Theory Tech., vol. 45, pp. 1847-1856, 1997..
[13]P. A. Kok and D. De Zutter, “Least-square estimation of the equivalent circuit parameters of a via-hole from a TDR reflectogram, including on-board rise time and delay estimation,” IEEE Trans. Components, Hybrids, and Manufacturing Technology, vol. 16, pp. 292-299, May 1993.
[14]E. Laermans, J. De Geest, D. De Zutter, F. Olyslager, S. Sercu, and D. Morlion, “Modeling complex via hole structures,” IEEE Trans. Advanced Packaging, vol. 25, pp. 206-214, May 2002.
[15]H. Zhu, A. R. Hefner, Jr., and J. S. Lai, “Characterization of power electronics system interconnect parasitics using time domain reflectometry,” IEEE Trans. Power Electronics, vol. 14, pp. 622-628, July 1999.
[16]W. B. Kuhn, Xin He, and M. Mojarradi, “Modeling spiral inductors in SOS processes,” IEEE Trans. Electron Devices, vol. 51, pp. 677-683, May 2004.
[17]T. S. Horng, J. M. Wu, L. Q. Yang, and S. T. Fang, “A novel modified-T equivalent circuit for modeling LTCC embedded inductors with a large bandwidth,” IEEE Trans. Microwave Theory Tech., vol. 51, pp. 2327-2333, Dec. 2003.
[18]I. Timmins and K. L. Wu, “An efficient systematic approach to model extraction for passive microwave circuits,” IEEE Trans. Microwave Theory Tech., vol. 48, pp. 1565-1573, Sept. 2000.
[19]T. Mangold and P. Russer, “Full-wave modeling and automatic equivalent-circuit generation of millimeter-wave planar and multilayer structures,” IEEE Trans. Microwave Theory Tech., vol. 47, pp. 851-858, June 1999.
[20]W. T. Beyene and J.E. Schutt-Aine, “Efficient transient simulation of high-speed interconnects characterized by sampled data,” IEEE Trans. Components, Hybrids, and Manufacturing Technology, vol. 21, pp. 105-114, Feb. 1998.
[21]G. Antonini, A.C. Scogna, and A. Orlandi, “Equivalent network synthesis for via holes discontinuities,” IEEE Trans. Advanced Packaging, vol. 25, pp. 528-536, Nov. 2002.
[22]G. Antonini, “SPICE equivalent circuits of frequency-domain responses,” IEEE Trans. Electromagnetic Compatibility, vol. 45, pp. 502-512, Aug. 2003.
[23]A. Scarlatti and C. L. Holloway, “An equivalent transmission-line model containing dispersion for high-speed digital lines-with an FDTD implementation,” IEEE Trans. Electromagnetic Compatibility, vol. 43, pp. 504-514, Nov. 2001.
[24]W. T. Beyene and J. Schutt-Aine, “Accurate frequency-domain modeling and efficient circuit simulation of high-speed packaging interconnects,” IEEE Trans. Microwave Theory Tech., vol. 45, pp. 1941-1947, Oct. 1997.
[25]K. M. Coperich, J. Morsey, V. I. Okhmatovski, A. C. Cangellaris, and A. E. Ruehli, “Systematic development of transmission-line models for interconnects with frequency-dependent losses,” IEEE Trans. Microwave Theory Tech., vol. 49, pp. 1677-1685, Oct. 2001.
[26]B. Gustavsen and A. Semlyen, “Enforcing passivity for admittance matrices approximated by rational functions,” IEEE Trans. Power Systems, vol. 16, pp. 97-104, Feb. 2001.
[27]S. H. Min and M. Swaminathan, “Construction of broadband passive macromodels from frequency data for simulation of distributed interconnect networks,” IEEE Trans. Electromagnetic Compatibility, vol. 46, pp. 544 - 558, Nov. 2004.
[28]M. Sung, W. Ryu, H. Kim, J. Kim, and J. Kim, “An efficient crosstalk parameter extraction method for high-speed interconnection lines,” IEEE Trans. Advanced Packaging, vol. 23, pp. 148-155, May 2000.
[29]J. G. Nickel, D. Trainor, and J. E. Schutt-Aine, “Frequency-domain-coupled microstrip-line normal-mode parameter extraction from S-parameters,” IEEE Trans. Electromagnetic Compatibility, vol. 43, pp. 495-503, Nov. 2001.
[30]C. T. Tsai and W. Y. Yip, “An experimental technique for full package inductance matrix characterization,” IEEE Trans. Components, Hybrids, and Manufacturing Technology, vol. 19, pp. 338-343, May 1996.
[31]A. Sutono, N. G. Cafaro, J. Laskar, and M. M. Tentzeris, “Experimental modeling, repeatability investigation and optimization of microwave bond wire interconnects,” IEEE Trans. Advanced Packaging, vol. 24, pp. 595-603, Nov. 2001.
[32]S. C. Burkhart, R. B. Wilcox, “Arbitrary Pulse Synthesis via Nonuniform Transmission lines,” IEEE Trans. Microwave Theory Tech., vol. 38, pp. 1514-1518, Oct. 1990.
[33]C. W. Hsue and T. W. Pan, “Reconstruction of nonuniform transmission lines from time-domain reflectometry,” IEEE Trans. Microwave Theory Tech., vol. 45, pp. 32 –38, Jan. 1997.
[34]C. Schuster and W. Fichtner, “Signal Integrity Analysis of Interconnects Using the FDTD Method and a Layer Peeling Technique,” IEEE Trans. Electromagnetic. Compatibility, vol. 42, pp. 229-233, May 2000.
[35]J. M. Jong and V. K. Tripathi, “Time-domain characterization of interconnect discontinuities in high-speed circuits,” IEEE Trans. Components, Hybrids, and Manufacturing Technology, vol. 15, pp. 497-504, Aug. 1992.
[36]K. D. Marx and R. I. Eastin, “A configuration-oriented spice model for multiconductor transmission lines with homogeneous dielectrics,” IEEE Trans. Microwave Theory Tech., vol. 38, pp. 1123-1129, Aug. 1990.
[37]A. Tripathi and V. K. Tripathi, “A configuration-oriented SPICE model for multiconductor transmission lines in an inhomogeneous medium,” IEEE Trans. Microwave Theory Tech., vol. 46, pp. 1997-2005, Dec. 1998.
[38]J. M. Jong, B. Janko, and V. K. Tripathi, “Time-domain characterization and circuit modeling of a multilayer ceramic package,” IEEE Trans. Components, Hybrids, and Manufacturing Technology, vol. 19, pp. 48-56, Feb. 1996.
[39]S. Pannala, A. Haridass, and M. Swaminathan, “Parameter extraction and electrical characterization of high density connector using time domain measurements,” IEEE Trans. Advanced Packaging, vol. 22, pp. 32-39, Feb. 1999.
[40]D. A. Smolyansky and S. D. Corey, “Characterization of differential interconnects from time domain reflectometry measurement,” TDA systems Inc.
[41]S. D. Corey and A. T. Yang, “Interconnect characterization using time-domain reflectometry,” IEEE Trans. Microwave Theory Tech., vol. 43, pp. 2151-2156, Sept. 1995.
[42]S. D. Corey and A. T. Yang, “Automatic netlist extraction for measurement-based characterization of off-chip interconnect,” IEEE Trans. Microwave Theory Tech., vol. 45, pp. 1934-1940, Oct. 1997.
[43]D. M. Sheen, S. M. Ali, M. D. Abouzahra, and J. A. Kong, “Application of the three-dimensional finite-difference time-domain method to the analysis of planar microstrip circuits,” IEEE Trans. Microwave Theory Tech., vol. 38, pp. 849-857, July 1990.
[44]C. Schuster, G. Leonhardt, and W. Fichtner, “Electromagnetic simulation of bonding wires and comparison with wide band measurements,” IEEE Trans. Advanced Packaging, vol. 23, pp. 69-79, Feb. 2000.
[45]F. Alimenti, P. Mezzanotte, L. Roselli, and R. Sorrentino, “Modeling and characterization of the bonding-wire interconnection,” IEEE Trans. Microwave Theory Tech., vol. 49, pp. 142-150, Jan. 2001.
[46]F. Xiao, W. Liu, and Y. Kami, “Analysis of crosstalk between finite-length microstrip lines: FDTD approach and circuit-concept modeling,” IEEE Trans. Electromagnetic. Compatibility, vol. 43, pp. 573-578, Nov. 2001.
[47]P. C. Cherry and M. F. Iskander, “FDTD analysis of high frequency electronic interconnection effects,” IEEE Trans. Microwave Theory Tech., vol. 43, pp. 2445-2451, Oct. 1995.
[48]E. X. Liu, E. P. Li, L. W. Li, and Zhongxiang Shen, “Finite-difference time-domain macromodel for simulation of electromagnetic interference at high-speed interconnects,” IEEE Trans. Magnetics, vol. 41, pp. 65-71, Jan. 2005.
[49]T. L. Wu, C. C. Kuo, C. C. Wang, S. M. Wu, and C. P. Hung, “A novel time-domain algorithm for synthesizing broadband macromodels of coupled interconnects,” IEEE Trans. Advanced Packaging, vol. 27, pp. 224-232, Feb. 2004.
[50]T. K. Sarkar and O. Pereira, “Using the Matrix Pencil to Estimate the Parameters of a Sum of Complex Exponentials,” IEEE Antenna and Propagation Magazine, vol. 37, pp. 48-55, 1995.
[51]T. L. Wu, C. C. Kuo, H. C. Chang, and J. S. Hsieh, “A novel systematic approach for equivalent model extraction of embedded high-speed interconnects in time domain,” IEEE Trans. Electromagnetic Compatibility, vol. 45, pp. 493-501, Aug. 2003.
[52]M. L. Crow and A. Singh, “The matrix pencil for power system modal extraction,” IEEE Trans. Power Systems, vol. 20, pp. 501-502, Feb. 2005.
[53]T. L. Wu, C. C. Wang, C. C. Kuo, and J. S. Hsieh, “A Novel Time-Domain Method for Synthesizing Broadband Macro-pi Models of Differential Via,” IEEE Microwave and Wireless Components Letters, vol. 15, pp. 378-380, May 2005.
[54]Y. Hua and T. K. Sarkar, “On SVD for estimating generalized eigenvalues of singular matrix pencil in noisea,” IEEE Trans. Signal Processing, vol. 39, pp. 892-900, April 1991.
[55]Z. A. Maricevic, T. K. Sarkar, Y. Hua, and A. R. Djordjevic, “Time-domain measurements with the Hewlett-Packard network analyzer HP 8510 using the matrix pencil method,” IEEE Trans. Microwave Theory Tech., vol. 39, pp. 538-547, March 1991.
[56]David M. Pozar, Microwave Engineerin second edition, John Wiley & Sons, Inc., pp. 206-244.
[57]Wilhelm Cauer, Synthesis of Linear Communication Networks: McGraw-Hill, 1958, vol. 1 and 2, pp. 181-220.
[58]T. L. Wu, S. T. Chen, J. N. Hwang, and Y. H. Lin, “Numerical and experimental investigation of radiation caused by the switching noise on the partitioned DC reference planes of high speed digital PCB,” IEEE Trans. Electromagnetic Compatibility, vol. 46, pp. 33-45, Feb. 2004.
[59]J. Lee, M. D. Rotaru, M. K. Iyer, H. Kim, and J. Kim, “Analysis and Suppression of SSN Noise Coupling Between Power/Ground Plane Cavities Through Cutouts in Multilayer Packages and PCBs,” IEEE Trans. Advanced Packaging, vol. 28, pp. 298-309, May 2005.
[60]S. Shahparnia and O. M. Ramahi, “Electromagnetic interference (EMI) reduction from printed circuit boards (PCB) using electromagnetic bandgap structures,” IEEE Trans. Electromagnetic Compatibility, vol. 46, pp. 580-587, Nov. 2004.
[61]L. Green, “Understanding the importance of signal integrity,” IEEE Circuits and Devices Magazine, vol. 15, pp. 7-10, Nov. 1999.
[62]F. Caignet, S. Delmas-Bendhia, and E. Sicard, “The challenge of signal integrity in deep-submicrometer CMOS technology,” IEEE Proceedings, vol. 89, pp. 556-573, April 2001.
[63]M. S. Sharawi, “Practical issues in high speed PCB design,” IEEE Potentials, vol. 23, pp. 24-27, April-May 2004.
[64]I. Novak, B. Eged, and L. Hatvani, “Measurement and simulation of crosstalk reduction by discrete discontinuities along coupled PCB traces,” IEEE Trans. Instrumentation and Measurement, vol. 43, pp. 170-175, April 1994.
[65]R. Goyal, “Managing signal integrity [PCB design],” IEEE Spectrum, vol. 31, pp. 54-58, March 1994.
[66]M. Nourani and A. R. Attarha, “Detecting signal-overshoots for reliability analysis in high-speed system-on-chips,” IEEE Trans. Reliability, vol. 51, pp. 494-504, Dec. 2002.
[67]P. J. Restle, K. A. Jenkins, A. Deutsch, and P. W. Cook, “Measurement and modeling of on-chip transmission line effects in a 400 MHz microprocessor,” IEEE Journal Solid-State Circuits, vol. 33, pp. 662-665, April 1998.
[68]K. Yee, “Numerical solution of inital boundary value problems involving maxwell''s equations in isotropic media,” IEEE Trans. Antennas and Propagation, vol. 14, pp. 302-307, May 1966.
[69]J. P. Berenger, “Perfectly matched layer for the FDTD solution of wave-structure interaction problems,” IEEE Trans. Antennas and Propagation, vol. 44, pp. 110-117, Jan. 1996.
[70]Z. Wu and J. Fang, “Numerical implementation and performance of perfectly matched layer boundary condition for waveguide structures,” IEEE Trans. Microwave Theory Tech., vol. 43, pp. 2676-2683, Dec. 1995.
[71]R. Mittra and U. Pekel, “A new look at the perfectly matched layer (PML) concept for the reflectionless absorption of electromagnetic waves,” IEEE Microwave and Wireless Components Letters, vol. 5, pp. 84-86, March 1995.