臺灣博碩士論文加值系統

摘要
高壓電源管理積體電路, 近年來被廣泛使用在白光發光 二 極體 , 液晶顯示器驅動器 和汽車電子等領域. 在高效能高可靠度的要求下, 採用 BCD 晶片製程 ( BCD: Bipolar, CMOS and LDMOS) 是目前最普遍的. 在低成本的考量下 , 每一個晶片儘可能縮小 , 封裝也使用成本最低廉的封裝型態 (例如SOP, SOT等等). 所以如何提供適足的散熱功能,充份的靜電防治能力變成不可或缺的工作. 在高壓製程部份, 近幾年研究及應用的資訊更為熱絡 . 但是都較局限於元件與製程的範圍.對於產品層級,系統層級的可靠性研究與應用的論文卻很少見.
本論文是以高壓電源管理積體電路為樣本, 研究低壓,高壓及高電流(例如LVNMOS, HVNMOS, LDNMOS)元件的特性對此產品的影響 ,及探討適當的高溫操作壽命試驗 ( HOLT )的方法, 並研究此產品系統層級的 ESD的可靠度. 本論文的實驗結果顯示在 ESD 保護部份,修改元件結構,製程及修改封裝打線型態後,充分提升了產品層級抗ESD能力. 在高溫操作壽命試驗部份,找到使用85℃提高 2V 的電壓為加速因子可以有效的進行高壓高電流IC的可靠度試驗. 在系統層級的ESD保護部份,確認了對過載電性衝擊(Over Electrical Stress), 必須做適當的隔離. 對 LED 陽極的焊點與LED散熱板的隔離空間進行研究, 確認了隔離空間 > = 4mm 是必須的

Abstract
High Voltage Integrated Circuit (HVIC) is popularly used in the fields of LCD controller, white LED Driver and Mobile Electronics at present. For high reliability consideration, the complex process as BCD (bipolar, CMOS and LDMOS) process is introduced worldwide. For cost down purpose, the chip size is reduced as small as possible and the low cost package solutions as SOP, SOT...etc are selected. So the key works in this study are to get enough power dissipation with high ESD robustness in the compact space. This thesis uses a 42V 1A BCB HVIC to study the ESD robustness at product level and system level, and also studies the methodology of High Temperature Operating Life (HTOL) test for the high power management IC.
Some specific results are (1) Significantly upgrade Product Level ESD robustness by way of changed device structure (Channel Length), skipped LDD process and wire bonding type of package. (2) After the experiments, we find HV IC performance, the reasonable experiment temperature is 85℃. To get enough accelerated factor, the accelerated factor of high voltage up is easy to handle with no extra cost in the new experiments. (3) Dynamic resistance of board level ESD protector will impact the internal circuit when the extra huge power is discharged. So the isolated space (between LED Anode soldered point and LED heat sink) is studied and verified. 4mm space can pass SL ESD 8KV test which is the minimum distance requirement in system level ESD.

目 錄

中文摘要 I
英文摘要 III
誌謝 V
目錄 VI
表目錄 VIII
圖目錄 X
第一章 緒論 1
1.1 前言........................................................................................…................1
1.2 研究動機................................................................................................…2
1.3 論文架構 ......................................………....…………………….….............2
第二章 論文的研討......…………………..……………………………… 4
2.1 HVIC 的重要元件 4
2.2 靜電保護電路與靜電放電保護機制 6
2.3 靜電放電模型 8
2.4 系統層級靜電放電 ( SLESD ) 測試規範IEC6100-4-2 介紹…..….10
第三章 產品可靠度驗證…........................................25
3.1 標準產品驗證執行. 25
3.2 標準產品驗證執行 25
3.3 檢討驗證結果和採取的行動...................................................................29
第四章 故障分析與製程變更..........................………...…..32
4.1 ESD MM EN Pin 不良的分析與改善 32
4.2 LX Pin不良原因分析與改善 34
4.3 HTOL test 檢討改良 38
4.4 分析 SLESD 驗證失效和改善.............................................................41
第五章驗證最佳化的產品...............................……….….63
5.1選擇一個最佳化的高壓積體電路 63
5.2最終產品可靠度驗證結果 64
第六章 特殊的成果和待續的工作.....................……………….65
6.1 特殊的成果 65
6.2 待續的工作 66


參考文獻……………………………………………………………………….67

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