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研究生:王昭元
研究生(外文):Chao-Yuan Wang
論文名稱:應用於多媒體即時傳輸之UDP/IPv6架構設計
論文名稱(外文):Design of UDP/IPv6 Architecture for Real-Time Multi-Media Application
指導教授:朱元山
指導教授(外文):Yuan-Sun Chu
學位類別:碩士
校院名稱:國立中正大學
系所名稱:電機工程所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2007
畢業學年度:96
語文別:中文
論文頁數:72
中文關鍵詞:記憶體複製中斷UDP/IP缷載引擎多媒體傳輸網路卡驅動程式雙中央處理器
外文關鍵詞:Multi-media TransferNIC DriverDual CPUUDP/IP Offload EngineInterruptMemory Copy
相關次數:
  • 被引用被引用:1
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  • 下載下載:51
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當網路流量變大時,目前的CPU處理大量的網路Traffic時,所執行的繁複Network Protocol task,將成為系統整體性能的瓶頸,包括在Throughput、CPU usage和Memory usage...等方面。而多媒體的應用,例如:VoIP、HDTV、VoD(Vedio on demand)、Web TV和Video Conference…等,已逐漸成為網路服務發展的重心,而這些應用皆基於UDP Protocol之上,故本論文首先提出一個以雙CPU來解決過多中斷與記憶體複製的架構,進而設計UDP/IP Offload Engine來加速多媒體傳輸的速度。其應用在嵌入式系統上,如此亦能減輕其CPU Loading。
最後,由於Driver在系統中扮演的任務,能與下層網路卡及上層protocol stack溝通,所以封包傳送與接收的效能與Driver也有密不可分的關係,但卻少有paper提及該如何去實作一個網路卡驅動程式。故本論文也將提出如何實作NIC driver的方法,來逹到嵌入式系統上的網路最高傳輸效能。
As the network traffic load has rapidly increased, the CPU workload becomes heavier and the network protocol task will become the bottleneck which includes throughput, CPU usage, memory usage, etc. The multi-media applications, such as VoIP, HDTV, VoD (Video on demand), web TV, video conference, etc, have gradually become the key point of developing network services based on UDP protocol. Therefore in this thesis we propose two architectures, the first one uses dual CPU architecture to resolve the excessive interrupts and memory copies problem. The second one uses UDP/IP ASIC architecture to speed up multi-media transmitting speed and to alleviate CPU loading. The task of driver in the system is to allow data link layer to communicate with TCP/IP protocol stack. Therefore the performance of sending and receiving packets is closely related to the driver. Papers seldom describe the implementation of network device driver. Therefore in this thesis, we illustrate the methods of realizing NIC driver to achieve the highest network transmitting rate in the embedded system.
第一章 簡介 1
1.1 現況概要 1
1.2 研究動機 1
1.3 論文架構 4
第二章 相關研究 5
2.1 分析網路協定瓶頸 5
2.2 抑制中斷 6
2.2.1 中斷問題 6
2.2.2解決中斷問題 6
2.3 UDP/IP缷載引擎 9
2.3.1 TCP/IP缷載引擎 9
2.3.2 遠端直接記憶體存取 10
第三章 系統架構 11
3.1 單CPU架構 11
3.2 雙CPU架構 12
3.3 UDP/IPv6 ASIC架構 13
3.4 架構優缺點比較 16
第四章 系統實作 18
4.1雙CPU架構實作 18
4.1.1硬體平台部分 19
4.1.1.1硬體平台介紹 19
4.1.1.2硬體平台架設實作 20
4.1.2 LWIP部分 22
4.1.2.1 LWIP簡介 22
4.1.2.2 LWIP實作 24
4.1.3Uni-OS部分 32
4.1.3.1 Uni-OS簡介 32
4.1.3.2 Uni-OS實作 34
4.1.4驅動程式部分 38
4.1.4.1驅動程式介紹 38
4.1.4.2 驅動程式實作 39
4.1.5客戶端應用程式 45
4.1.6伺服端應用程式 46
4.2 UDP/IPv6架構實作 47
4.2.1封包緩衝記憶體 49
4.2.2封包預先處理器 50
4.2.3檢和碼計算電路 51
4.2.4封包處理器 53
第五章 效能與分析 54
5.1 測試環境 54
5.2 效能與分析 55
第六章 結論與未來展望 59
6.1 結論 59
6.2 未來工作 60
參考文獻 61
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