臺灣博碩士論文加值系統

近年來積體電路的進步，使得積體電路廣泛應用於生醫系統，因此伴隨發展許多的可攜式與植入式生醫系統。為了確保生醫系統可長時間監測功能，前端電路必須擁有低功率與低電壓條件。前端電路最常建構類比方塊為運算轉導放大器 (OTA)，在低電壓電源的特性下OTA更是需要軌對軌輸入訊號來達到最大的操作範圍。
本研究提出一種低功率、低電壓軌對軌輸入級OTA架構，其電路包含bulk-driven差動對、PMOS差動對、shunt down電路與folded cascode 負載，基於提出電路架構可在低電壓下達到軌對軌輸入範圍，而且不僅避免bulk-driven電路漏電流的產生也可節省功率消耗，模擬OTA操作電源電壓為0.9V，功率消耗為23μW，使用製程為TSMC 0.35μm Mixed Signal 2P4M Polycide 3.3/5V技術。

The development of integrated circuit (IC) technologies for biomedical system applications has been widely used in recent years. Moreover, it has brought a considerable amount of portable and implantable biomedical equipment. In order to satisfy with ambulatory functions, low power and low voltage has been essential condition for the front-end circuit. Hence, as a basic analog building block, operational transconductance amplifier (OTA) has a limited voltage headroom due to the low battery-voltage characteristics, and it thereby needs rail-to-rail input signal swing to maximize the signal operational range.
The paper present a low-power low-voltage rail-to-rail operational transconductance amplifier (OTA), which combined bulk-driven differential pair, PMOS differential pair, shunt down circuit and folded cascode load. Based on the proposed topology, the low voltage OTA with rail-to-rail input common-mode range is achieved. The scheme not only avoids leakage current of conventional bulk-driven circuit but also reduces power consumption. The simulated power consumption of the OTA is 23μW under conditions of 0.9V supply voltage in TSMC 0.35μm Mixed Signal 2P4M Polycide 3.3/5V technology.

摘要 I
ABSTRACT II
誌謝 III
目錄 IV
圖索引 VI
表索引 IX
第一章 緒論 1
1.1 前言與背景 1
1.2 研究動機 2
1.3 文獻回顧 3
1.4 研究目的 6
第二章 原理 8
2.1 生理訊號簡介 8
2.2 BULK-DRIVEN 10
第三章 研究方法 15
3.1 低電壓軌對軌輸入級 15
3.2 SHUNT DOWN 電路 19
3.3 低功率軌對軌輸入運算轉導放大器之設計 19
3.4 偏壓電路 22
第四章 模擬結果與討論 24
第五章 結論與未來展望 44
參考文獻 45
作者簡歷 47
文章發表 47

圖索引
圖 1- 1 BIOMEDICAL SIGNAL PROCESS SYSTEM 3
圖 1- 2 COMPLEMENTARY DIFFERENTIAL PAIR [10] 4
圖 1- 3 COMPLEMENTARY BULK-DRIVEN DIFFERENTIAL PAIR [12, 13, 14] 5
圖 1- 4 空乏型NMOS特性 (A) 接法(B) SOURCE電壓相對於VIN,CM [15] 5
圖 1- 5 空乏型NMOS結合BULK-DRIVEN組成軌對軌輸入級[15] 6

圖 2- 1 生理訊號的振幅與頻寬 [16] 8
圖 2- 2 生醫訊號處理系統前端電路 9
圖 2- 3 CONVENTIONAL DIFFERENTIAL PAIR 10
圖 2- 4 BULK-DRIVEN DIFFERENTIAL PAIR 10
圖 2- 5 DRAIN CURRENT AND LEAKAGE CURRENT VERSUS VIN,CM 12
圖 2- 6 以BULK為輸入端CMOS結構剖面[20] 13
圖 2- 7 解釋LATCH UP電路簡圖 14

圖 3- 1 RAIL-TO-RAIL INPUT STAGE BASED ON PMOS/BULK-DRIVEN 15
圖 3- 2 定轉導回授電路 [23] 16
圖 3- 3 本研究OTA包含的子電路 17
圖 3- 4 軌對軌輸入級 18
圖 3- 5 比較本研究與文獻軌對軌輸入架構 18
圖 3- 6 SHUNT DOWN 電路 19
圖 3- 7 軌對軌輸入級OTA 21
圖 3- 8 單極點電路之GBW 22
圖 3- 9 低電壓操作偏壓電路 23

圖 4- 1 設計OTA規格流程 26
圖 4- 2 軌對軌輸入級OTA (A) OPEN LOOP GAIN (B) PHASE MARGIN (TT) 27
圖 4- 3 軌對軌輸入級OTA開迴路增益 28
圖 4- 4 軌對軌輸入級OTA共模拒斥比 28
圖 4- 5 軌對軌輸入級OTA電源拒斥比 29
圖 4- 6 軌對軌輸入級OTA電源拒斥比 29
圖 4- 7 軌對軌輸入級OTA 共模輸入範圍 30
圖 4- 8 軌對軌輸入級OTA INPUT OFFSET 30
圖 4- 9 軌對軌輸入級OTA SLEW RATE 31
圖 4- 10 溫度影響 (A) THRESHOLD VOLTAGE (B) DRAIN CURRENT (C) TRANSCONDUCTANCE 33
圖 4- 11 溫度影響 (A) GBW (B) OPEN LOOP GAIN (C) BANDWIDTH (D) PHASE MARGIN 34
圖 4- 12 針對兩種不同的OTA模擬全操作區段的等效轉導 35
圖 4- 13 對於兩種不同的OTA模擬全操作區段的增益頻寬積 36
圖 4- 14 對於兩種不同的OTA模擬全操作區段的開迴路增益 36
圖 4- 15 對於兩種不同的OTA模擬全操作區段的頻寬 37
圖 4- 16 對於兩種不同的OTA模擬ICMR 37
圖 4- 17 共模電壓對電路影響 39
圖 4- 18 THD 響應 39
圖 4- 19 VDD變化 (A)開迴路增益 (B)對頻寬蒙地卡羅分析 40
圖 4- 20 偏壓點的起始情況 41
圖 4- 21 CLASS AB OUTPUT STAGE 43
表索引
表 1- 1 常見死亡原因 2
表 2- 1 常見生理訊號參數 9
表 2- 2 GATE DRIVEN與BULK DRIVEN特性比較 12
表 4- 1 以文獻[18]條件下所訂定GBW 25
表 4- 2 低功率運算轉導放大器模擬結果 (含BIAS) 32
表 4- 3 兩種不同的OTA全區段操作功率消耗 38
表 4- 4 比較其他低電壓OTA效能 42
表 4- 5 與其它低電壓軌對軌商用OPA比較效能 43

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