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In our research,we derive an equation of the relation
between the depletion width and the bias of the pn junction of
heterostructure JFET to determine the threshold voltage of the
device and prove it by experiments. We fabricated two sets of
HJFET,one is InGaAs/GaAs JFET and the other is AlGaAs/InGaAs
JFET. In the former set,we demonstrate the good device
linearity of buried channel doping =1x10^18cm^-3 by experiments
and 2-D simulations. And its current and transconductance are
149.4mA/mm and 146mS/mm at Vds=3V and Vgs=0.8V. The later set,
we demonstrate the good device linearity of channel doping=2x10
^18cm^-3 by experiments. And its current and transconductance
are 156mA/mm and 193.4mS/mm at Vds=3V and Vgs=1V. Its gate
turn-on voltage can amount to 1V,and its reverse bias current
is as low as 9.78uA/mm at reverse bias=6V,that it means its
leakage current is very low.Besides,we can control the gate
capacitance in 2fF/um by all epitaxy process.
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