臺灣博碩士論文加值系統

自適應共振論網路 (Adaptive Resonance Theory, ART) 是一種無監督式學習網路模式，其兼具穩定性與可塑性之雙重優勢，即新事物輸入時，舊有的事物可被適當的保留，又可同時迅速的予以學習。本論文主要是實現一以ART理論為基礎改良之FAST (Flexible Adaptable-Size Topology) 晶片。此晶片為學習分類控制器，使用XCV800之晶片以Verilog硬體描述語言實現。主要架構可分為Similarity、Learning、Pruning三部份，能依每次學習後動態更新Neuron的感知域位置及大小，使分類邊界為動態，並且會適當的對多個有重覆感知域的Neuron進行Pruning的動作，節省空間來存放更多的類別。最後由FPGA運算出的分類結果透過A/D Converter Multifunctional Card傳送給PC模擬之AHC架構學習，控制身為受控體之PC模擬倒單擺系統。

Adaptive Resonance Theory (ART) is a kind of unsupervised learning network pattern with advantages of stability and plasticity, which mean that network can keep old data properly and learn new ones quickly in the mean time. The objective of this thesis is to implement an ART-based chip by Flexible Adaptable-Size Topology (FAST). The chip designed in Verilog-HDL with XCV800 FPGA plays a role as a categorization controller. The main architecture of which includes three parts. They are "Similarity", "Learning" and "Pruning", respectively. The architecture updates location and size of receptive field dynamically, makes categorization boundaries variable, and prunes neurons with overlapped receptive field to save space. Finally, the categorized results computed by FPGA are sent to PC-simulated AHC which controls a PC-simulated plant, cart-pole system, and tries to make it balanced.

第一章 緒論………………………………………………..1
1.1前言………………………………………………………1
1.2研究動機…………………………………………………2
1.3論文架構…………………………………………………3
第二章 應用原理……………………………………………4
2.1分類………………………………………………………4
2.1.1 適應共振理論……………………………………… 4
2.1.2 Flexible Adaptable-Size Topology ……………9
2.2 加強式學習……………………………………………12
2.2.1 Adaptive Heuristic Critic…………………….12
2.2.2倒單擺滑車系統…………………………………….14
2.2.3 AHC with Box Decoder……………………………15
2.2.4 AHC with ART Decoder……………………………18
第三章 硬體架構………………………………………….24
3.1 ART Decoder…………………….……………………25
3.1.1 輸入輸出緩衝器I/O Buffer………..……………26
3.1.2 Register Bank…………………………………….28
3.1.3 Similarity………………………….…………….29
3.1.4 Learning……………………………………………33
3.1.5 Pruning……………………….…………………..40
3.1.6 ART Decoder模組整合- Control…………………45
3.2溝通介面-Interface Multifunction Card……....48
3.3電壓轉換板…………………………………………….50
第四章 研究成果分析…………………………….......51
4.1研究成果步驟………………………………………….51
4.2軟體模擬……………………………………………….52
4.2.1 ART分類模擬……………………………………….52
4.2.2 Cart-Pole模擬…...………………………………55
4.3硬體與介面整合測試………………………………….56
4.4研究成果……………………………………………….59
第五章 結論與未來展望……………….……….……...63
Reference………………………………………….…....65
圖附錄……………………………………………...…...67

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