Chapter1 Introduction 1
1.1 Background 1
1.2 Related Work 1
1.3 Motivation 2
1.4 Thesis Organization 3
Chapter2 Training Phase Algorithm 5
2.1 System Overview 5
2.2 Overview of SVM Algorithm 6
2.3 Overview of SMO Algorithm 8
Chapter3 Testing Phase Algorithm 14
3.1 Overview of Feature Extraction Algorithm 14
3.1.1 End-Point Detection 14
3.1.2 Pre-Emphasis 15
3.1.3 Frame Blocking 16
3.1.4 Hamming Window 16
3.1.5 LPCC 16
3.2 Overview of Speaker Recognition Algorithm 17
Chapter4 HW/SW Co-design 20
4.1 HW/SW Co-design 20
4.1.1 HW/SW Co-design 20
4.1.2 AMBA Protocol 21
4.1.3 EASY Platform 26
4.2 HW/SW Partition 27
4.3 HW/SW Co-optimization 28
4.3.1 Acceleration Implementation by Fixed-point 28
4.3.2 Fixed-point Format for Software 29
4.3.3 Floating-system VS. Fixed-system 31
Chapter5 Hardware Implementation 34
5.1 Overview of Hardware Architecture 34
5.2 Computing Engine 35
5.2.1 Process Element Design 35
5.2.2 Computing Engine Design 37
5.3 Distributed Memory 39
5.4 Feature Processing Engine 40
5.5 Optimal Condition Checking Engine 43
5.6 SMO Controller Design 44
5.6.1 Main Controller Design 44
5.6.2 STEPs Controller Design 48
5.6.2.1 STEP1 Controller Design 48
5.6.2.2 STEP2 Controller Design 50
5.6.2.3 STEP3 Controller Design 54
5.6.2.4 STEP4 Controller Design 55
5.6.2.5 STEP5 Controller Design 57
Chapter6 Experimental Results 60
6.1 Introduction to Experimental Environment 60
6.2 Introduction to CDK Embedded System 61
6.3 FPGA Implementation 62
6.4 Simulation Result 62
Chapter7 Conclusion and Future Work 65
7.1 Conclusion 65
7.2 Future Work 65
References 66
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