臺灣博碩士論文加值系統

一個數位輸出的溫度感測系統包括了前端的溫度感測電路、參考電壓源，和後端的類比數位轉換器。本文探討溫度感測系統前端部分的設計，以ADS做電路模擬。藉由CMOS製程中的雙載子接面電晶體，利用其VEB電壓對溫度變化的特性，來完成溫度感測電路、參考電壓源，電路模擬是使用TSMC公司的CMOS 0.25um 1P5M的標準製程參數。在-25℃∼125℃的溫度範圍內，模擬顯示所設計的電路有正比於溫度的感測電壓，其隨溫度的變化率為3.6mV/℃。參考電壓( )為1.21V，溫度係數為8.3ppm/℃。
另外提出一型電路的設計具有參考電壓 的形式。將雙載子接面電晶體的VEB電壓對溫度做二階泰勒級數展開，再以 的線性組合來完成溫度的二階補償。以電流模式的電路架構達到VEB電壓的線性組合，使用TSMC 0.18um標準製程參數，模擬結果可達到當VDD=1.8V時，從-40℃到125℃的溫度範圍，參考電壓為255mV，溫度係數為7.8 ppm/℃，消耗的電流為408uA，消耗的功率為0.73mW（在25℃）。

A temperature sensing system with digital output consists of a front part and a rear part. The front part includes temperature sensor and bandgap voltage reference. The rear part is an analog to digital converter (ADC). In CMOS technology, the BJT device is used as the basic temperature sensor. The base-emitter voltage (VEB) can be approximated as a linear function of temperature. By using it, temperature sensor and bandgap voltage reference can be accomplished. The simulation of the front part using a standard TSMC 0.25um 1P5M CMOS process is presented in the thesis. The designed PTAT (Proportional To Absolute Temperature) circuit has an output voltage in proportion to absolute temperature with 3.6mV / ℃. The reference voltage (Vref) is 1.21V with an effective temperature coefficient of 8.3 ppm/℃ from -25℃~125℃.
Further more, A new type of bandgap voltage reference, in the form of , is proposed. We expand VEB(T) into Taylor series. After second-order compensation with one scaling factor a1=1 and a2 =-0.79, we will get a third-order temperature dependency of bandgap voltage reference. With current mode topology, the circuits design achieves a second-order compensation of VEB. It is simulated with the models of standard TSMC 0.18um 1P6M process. From simulation, the output voltage is 255mV with an effective temperature coefficient of 7.8 ppm/℃ for the temperature range -40℃~125℃. Total current consumption is about 408uA and power consumption is about 0.73mW at 25℃ for this proposed circuit.

中文摘要Ⅰ
英文摘要Ⅱ
致謝Ⅳ
目錄索引Ⅴ
圖索引Ⅶ
表格索引IX

第一章 序論 1
1-1 背景簡介1
1-2 動機2
1-3 感測器設計原理5
1-4 論文架構6

第二章 基本溫度感測電路與能帶隙參考電壓源 7
2-1 傳統溫度感測電路的回顧7
2-2 傳統能帶隙參考電壓源的回顧10
2-3 模擬結果13

第三章 新型能帶隙參考電壓源 15
3-1 理論基礎15
3-2 電路實現20
3-2-1 運算放大器（OP-AM）20
3-2-2 PTAT24
3-2-3 CTAT28
3-2-4 用電流模式（current mode）來執行 …30
3-2-5 啟動電路start-up32

第四章 總結與未來展望36
4-1 總結36
4-2 未來展望38

參考文獻39

圖索引
圖 1. 1 電子式溫度感測器分類圖1
圖 1. 2 溫度感測系統3
圖 1. 3 感測器示意圖 4
圖 1. 4 橫向雙載子接面電晶體剖面圖5
圖 1. 5 縱向雙載子接面電晶體剖面圖5
圖 2. 1 8
圖 2. 2 跨壓在R1 8
圖 2. 3 PTAT 電流9
圖 2. 4 PTAT電壓10
圖 2. 5 能帶隙參考電壓源原理11
圖2. 6 溫度感測電路與參考電壓源12
圖2. 7 佈局圖12
圖 2. 8 PTAT電流13
圖 2. 9 PTAT電壓(R2=50K) 14
圖 2. 10 參考電壓對溫度關係圖14
圖. 3. 1 BJT15
圖. 3. 2 18
圖 3. 3 (a) n型輸入差動對(b) p型輸入差動對21
圖 3. 4 採用的雙級組態運算放大器電路圖22
圖 3. 5 增益對頻率響應圖23
圖 3. 6 相位邊際值phase margin23
圖 3. 7 PSRR24
圖 3. 8 PTAT電壓的產生25
圖 3. 9 跨壓在R1 25
圖 3. 10 PTAT電流25
圖 3. 11 PTAT電壓26
圖 3. 12 對溫度變化的模擬27
圖 3. 13 與溫度關係的模擬圖27
圖 3. 14 PTAT電流的模擬圖28
圖 3. 15 CTAT電流29
圖 3. 16 PTAT與 29
圖 3. 17 CTAT電流與溫度的模擬圖29
圖 3. 18 用電流模式來執行 30
圖 3. 19 Vref模擬結果31
圖 3. 20 Vref與供應電壓的關係圖32
圖 3. 21 啟動電路33
圖 3. 22 啟動電流與Vp的關係圖33
圖 3. 23 暫態模擬(a)(b) 34
圖 3. 25 完整電路圖35
圖 4. 1 (a)參考電壓的溫度誤差(MAPLE模擬) 37
(b)電路設計之參考電壓(PSPICE) 37

表格索引
表 3. 1 不同運算放大器架構的效能比較20
表 4. 1 相關論文的比較37

1. S. M. Sze, “Classification and terminology of sensors”; Semiconductor Sensors, edited by S. M. Sze, John Wiley & Sons, Inc., pp. 1-15, 1994.
2. A. Bakker, J.H. Huijsing, ” Micropower CMOS temperature sensor with digital output,” IEEE Journal of Solid-State Circuits, vol. 31 , Issue: 7 , pp. 933 - 937, July 1996.
3. E.A. Vittoz, O. Neyroud,“A low-voltage CMOS bandgap reference,” IEEE Journal of Solid-State Circuits, vol. 14 , Issue: 3 , pp.573 - 579 , Jun 1979.
4. E.A. Vittoz, “MOS transistors operated in the lateral bipolar mode and their application in CMOS technology,” IEEE Journal of Solid-State Circuits, vol. 18 , Issue: 3 , pp.273 – 279, Jun 1983.
5. D. Hibiber, ‘A New Semiconductor Voltage Standard,” ISSCC Dig. of Tech. Papers, pp 32-33, Feb. 1964.
6. Behzad Razavi, “Design of Analog CMOS Integrated Circuits” McGraw-Hill, 2001.
7. Gray, Hurst, Lewis and Meyer, Analysis and Design of Analog Integrated Circuits, John Wiley & Sons, Inc., 2001
8. S. M. Sze, Semiconductor devices, physics and technology, John Wiley & Sons, Inc., 1985
9. R, Amador, A. Polanco, A. Nagy, M. Alvarez; "Design methods of low-voltage curvature-corrected bipolar bandgap references based on the sum of base-emitter voltages," Archives of the VII Workshop IBERCHIP; Montevideo, Uruguay; March, 2001
10. A. Azarkan, A. van Staveren, F. Fruett, ”A low-noise bandgap reference voltage source with curvature correction,” IEEE International Symposium on Circuits and Systems, Volume: 3, Pages:III-205 - III-208 vol.3 , May 2002
11. TSMC 0.18μm mixed signal 1P6M salicide 1.8V/3.3V RF spice models, Taiwan Semiconductor Manufacturing Co. Ltd.
12. J.H. Huijsing, Analog circuit design:low-noise, low-power, low-voltage; mixed-mode design with CAD tools; voltage, current and time references, Kluwer Academic Publishers, 1996.
13. Andrea Boni, Member, IEEE, ”Op-amps and Startup Circuitsfor CMOS Bandgap References with Near 1-V Supply”, IEEE Journal of Solid-State Circuits, vol. 37, no. 10, October 2002.
14. A.J. Annema, “Low-power bandgap references featuring DTMOSTs,” IEEE Journal of Solid-State Circuits, vol. 34, pp. 949-955, July 1999.
15. Shu-Yuan Chin, Chung-Yu Wu, “A New Type of Curvature-compensated CMOS Bandgap Voltage Reference ”, VLSITSA, 1991.
16. S. L. Lin and C.A.T. Salama, “A Vbe(T) model with application to bandgap reference design,” IEEE Journal of Solid-State Circuits, vol. SC-20, pp. 1283-1285, Dec 1985.
17. B. S. Song and P. R. Gray, “A Precision curvature-compensated CMOS bandgap reference,” IEEE Journal of Solid-State Circuits, vol. SC-18, pp. 634-943, Dec 1983