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研究生:謝昌哲
研究生(外文):Chang-Che Hsieh
論文名稱:具適應性快速充放電技巧之電流模式直流-直流降壓轉換器
論文名稱(外文):Adaptive Fast Charging Control Technique for Current Mode DC-DC Buck Converters
指導教授:陳中平陳中平引用關係
指導教授(外文):Chung-Ping Chen
口試委員:陳怡然陳耀銘陳秋麟
口試委員(外文):Yi-Jan ChenYaow-Ming ChenChern-Lin Chen
口試日期:2014-10-09
學位類別:碩士
校院名稱:國立臺灣大學
系所名稱:電子工程學研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2014
畢業學年度:103
語文別:英文
論文頁數:85
中文關鍵詞:降壓轉換器電流模式控制暫態響應補償電路脈衝寬度調變
外文關鍵詞:buck convertercurrent mode controltransient responsecompensation circuitpulse width modulation
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在現今消費性電子產品中,尤以手持式產品的應用上,需求越來越廣泛。擁有高效能的電源轉換器日趨重要,而隨著製程的演進,信號擺幅及供應電壓持續降低。因此,今日的電源轉換器必需在負載變動時能做出快速的反應並且維持穩定的輸出電壓。
在傳統切換式轉換器中,由於電感的限制,電流無法立即改變。本論文提出新的架構,具適應性快速充放電技巧之脈衝寬度調變電流模式直流降壓轉換器,主要藉由增加額外提供之路徑,一條直接補償於輸出端,另外兩條補償於控制迴路。當負載發生變化時,此技巧會打開輸出端之補償路徑,來抽取或灌入電流,並補償至原本的控制迴路,藉此加速暫態反應。
這個架構被實現於TSMC 0.25μm CMOS製程。根據量測結果,本晶片暫態響應的回復時間約為6~7 μs。相較於傳統架構而言,回復時間減少了約40~50%。另外在轉換效率方面,由於快速充放電迴路僅在暫態時運作,本晶片在輸出電流100~500 mA時,轉換效率仍能介於78~85%之間。其他細節與量測結果包含在本論文內。


The switching regulators have been widely used in power supply systems and are becoming a common building block in modern VLSI systems, especially for the growing number of battery-operated portable devices. With the evolution of the process, the supply voltage and the signal level decrease. Therefore, fast load transient response to keep output voltage stable and clean becomes very critical for voltage regulators nowadays.
The output current slew rate of the switching converter is restricted by the inductor in conventional architecture. In this thesis, we propose adaptive fast charging control technique for current mode dc-dc buck converters to improve this issue.
In this architecture, we add adaptive fast charging control technique, which has some new paths connected to the output capacitance and the control loop. When the output load current becomes large or small instantly, the additional current path will source or sink current to the output and compensate the control loop to achieve fast transient response.
This technique is implemented with TSMC 0.25μm CMOS process. Measurement results show that the recovery time is within 6~7μs. Compared with the conventional design, which typically gives 12μs, the recovery time is reduced by about 40-50%. In addition, since the adaptive fast charging control only works in transient response, the power conversion efficiency is still in a range of 78%~85% with load current between 100 mA and 500 mA in the proposed architecture.


誌謝 i
摘要 iii
Abstract v
Content vii
List of Figures ix
List of Tables xiii
Chapter 1 1
Introduction 1
1.1 Background of Regulators 1
1.2 Classification of Voltage Regulators 2
1.3 Design Motivation 10
1.4 Thesis Organization 12
Chapter 2 13
Fundamental of DC-DC Buck Converters 13
2.1 Performance Metrics 13
2.2 Architecture of DC-DC Buck Converters 18
2.3 Output Voltage Ripple Estimation 23
2.4 Feedback Loop Control 25
Chapter 3 35
Proposed Adaptive Fast Charging Control Technique 35
3.1 Prior Work 35
3.2 Analysis of Prior Work 37
3.3 Proposed Adaptive Fast Charging Control Technique 40
3.4 Behavior Model Simulation 43
Chapter 4 46
Circuit Implementation 46
4.1 Direct fast charging path 46
4.2 Error Amplifier 48
4.3 Oscillator and Ramp Generator 51
4.4 Current Sensor 53
4.5 V-I Converter 55
4.6 Comparator 57
4.7 Non-overlap and Driver 60
Chapter 5 62
Measurement 62
5.1 Chip Photo 63
5.2 Measurement Setup 63
5.3 Measurement Results 65
5.4 Comparison Table 78
Chapter 6 79
Conclusion and Future Works 79
6.1 Conclusion 79
6.2 Future Works 80
REFERENCES 81


[1]B. Razavi, Design of Analog CMOS Integrated Circuit, McGraw-Hill Higher Education, 2001.
[2]Y.-H. Lin, K.-L. Zheng, and K.-H. Chen, “Power MOSFET array for smooth pole tracking in LDO regulator compensation,” in Proc. IEEE Midwest Symp. Circuits and Systems (MWSCAS), Aug. 2007, pp. 554-557.
[3]H.-J. Yang, H.-H. Huang, C.-L. Chen, M.-H. Huang, and K.-H. Chen, “Current feedback compensation (CFC) technique for adaptively adjusting the phase margin in capacitor-free LDO regulators,” in Proc. IEEE Midwest Symp. Circuits and Systems (MWSCAS), Aug. 2008, pp. 5-8.
[4]C.-H. Lin, K.-H. Chen, and H.-W. Huang, “Low-dropout regulators with adaptive reference control and dynamic push-pull techniques for enhancing transient performance,” IEEE Trans. Power Electron., vol. 24, no. 4, pp. 1016-1022, Apr. 2009.
[5]M. Al-Shyoukh, H. Lee, and R. Perez, “A transient-enhanced low-quiescent current low-dropout regulator with buffer impedance attenuation,” IEEE J. Solid-State Circuits, vol. 42, no. 8, pp. 1732-1742, Aug. 2007.
[6]P. Favrat, P. Deval and M. J. Declercq, “A high-efficiency CMOS voltage doubler,” IEEE J. Solid-State Circuits, vol. 33, no. 3, pp. 410-416, Mar. 1998.
[7]J. Starzyk, Y.-W. Jan, and F. Qiu, “A DC-DC charge pump design based on voltage doublers,” IEEE Trans. Circuits Syst. I: Fund. Theory and Appl., vol. 48, no. 3, pp. 350-359, Mar. 2001.
[8]C.-Y. Hsieh, P.-C. Fan, and K.-H. Chen, “A dual phase charge pump with compact size,” in Proc. IEEE International Conference on Electronics, Circuits and Systems (ICECS), Dec. 2007, pp. 202-205.
[9]Y.-K. Luo, K.-H. Chen, and W.-C. Hsu, “A dual-phase charge pump regulator with nano-ampere switched-capacitor CMOS voltage reference for achieving Low output ripples,” in Proc. IEEE International Conference on Electronics, Circuits and Systems (ICECS), Sep. 2008, pp. 446-449.
[10]R. B. Ridley, “A new, continuous-time model for current-mode control,” IEEE Trans. Power Electron., vol. 6, no. 2, pp. 271–280, Apr. 1991.
[11]F.-F. Ma, W.-Z. Chen, and J.-C. Wu, “A monolithic current-mode buck converter with advanced control and protection circuit,” IEEE Trans. Power Electron., vol. 22, no. 5, pp. 1836–1846, Sep. 2007.
[12]C.-Y. Leung, P. K. T. Mok, and K.-N. Leung, “A 1-V integrated current mode boost converter in standard 3.3/5-V CMOS technologies,” IEEE J. Solid-State Circuits, vol. 40, no. 11, pp. 2265–2274, Nov. 2005.
[13]D. Ma, W.-H. Ki, and C.-Y. Tsui, “A pseudo-CCM/DCM SIMO switching converter with freewheel switching,” IEEE J. Solid-State Circuits, vol. 38, no. 6, pp. 1007–1014, Jun. 2003.
[14]B. Arbetter, R. W. Erickson, and D. Maksimovic, “DC-DC converter design for battery-operated systems,” in Proc. IEEE Power Electronics Specialists Conf. (PESC), Jun. 1995, pp.103–109.
[15]A. I. Pressman, Switching Power Supply Design, McGraw-Hill, 1997.
[16]M. Brown, Power Supply Cookbook, Edn Series for Design Engineers. Newnes, 2001.
[17]R. W. Erickson and D. Maksimovic, Fundamentals of Power Electronics, 2nd ed. Norwell, MA: Kluwer, 2001.
[18]R. Redl and J. Sun, “Ripple-based control of switching regulators—An overview,” IEEE Trans. Power Electron., vol. 24, no. 12, pp. 2669–2680, Dec. 2009.
[19]S. Hsu, A. Brown, L. Rensink, and R. Middlebrook, “Modeling and analysis of switching dc-to-dc converters in constant frequency current programmed mode,” in Proc. IEEE Power Electronics Specialists Conf. (PESC), Jun. 1979, pp. 284–301.
[20]P.-J. Liu, Y.-K. Lo, H.-J. Chiu, and Y.-J. Chen, “Dual-current pump module for transient improvement of step-down DC-DC converters,” IEEE Trans. Power Electron., vol. 24, no. 4, pp. 985–990, Apr. 2009.
[21]B.-T. Hwang, “Design and Implementation of the Current Mode Buck Converter with Adaptive Load Transient Enhancement Techniques,” Master''s Thesis, Univ. of National Taiwan, Graduate Institute of Electronics Engineering, Taipei, Taiwan 2013.
[22]C.-F. Lee and P. K. T. Mok, “A monolithic current-mode CMOS DC-DC converter with on-chip current-sensing technique,” IEEE J. of Solid-State Circuits, vol. 39, no. 1, pp. 3-14, Jan. 2004.
[23]R. Gregorian, Introduction to CMOS Op-Amps and Comparators. New York: Wiley, 1999.
[24]C.-Y. Leung, P. K. T. Mok, K.-N. Leung, and M. Chan, “An integrated CMOS current-sensing circuit for low-voltage current-mode buck regulator,” IEEE Trans. Circuits Syst. II, vol. 52, no. 7, pp. 394 - 397, Jul. 2005.
[25]Y.-H. Lee, S.-J. Wang, and K.-H. Chen, “Quadratic differential and integration technique in V2 control buck converter with small ESR capacitor,” IEEE Trans. Power Electron., vol. 25, no. 4, pp. 829–838, Apr. 2010.
[26]P. Y. Wu, S. Y. S. Tsui, and P. K. T. Mok, “Area- and power-efficient monolithic buck converters with pseudo-Type III compensation,” IEEE J. of Solid-State Circuits, vol. 45, no. 8, pp. 1446-1455, Aug. 2010.
[27]P.-J. Liu, W.-S. Ye, J.-N. Tai, H.-S. Chen, J.-H. Chen, and Y.-E. Chen, “A high-efficiency CMOS DC-DC converter with 9- μs transient recovery time,” IEEE Trans. Circuits Syst. I, vol. 59, no. 3, pp. 575 - 583, Mar. 2012.
[28]Y.-H. Lee, S.-C. Huang, S.-W. Wang, and K.-H. Chen "Fast transient (FT) technique with adaptive phase margin (APM) for current mode DC-DC buck converters," IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 20, no. 10, pp. 1781 -1793, Oct. 2012.
[29]H.-W. Huang, K.-H. Chen, and S.-Y. Kuo, “Dithering skip modulation, width and dead time controllers in highly efficient DC-DC converters for system-on-chip applications,” IEEE J. Solid-State Circuits, vol. 42, no. 11, pp. 2451–2465, Nov. 2007.


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