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研究生:黃郁書
研究生(外文):Huang, Yu-Shu
論文名稱:以可見光與遠紅外光雷射退火技術 製作低熱預算奈米級矽鍺電晶體
論文名稱(外文):Visible and Far Infrared Laser Annealing-enabled Low Thermal Budget SiGe Nano-scaled Transistor
指導教授:鄒志偉
指導教授(外文):Chow, Chi-Wai
口試委員:謝嘉民葉文冠郭浩中張廖貴術
口試委員(外文):Jia-Min HsiehYeh, Wen-KuanKuo, Hao ChungChang-Liao, Kuei-Shu
口試日期:2015-07-27
學位類別:碩士
校院名稱:國立交通大學
系所名稱:光電工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2015
畢業學年度:103
語文別:英文
論文頁數:69
中文關鍵詞:遠紅外光雷射退火矽鍺電晶體
外文關鍵詞:far infrared ray laser annealsilicon-germanium transistor
相關次數:
  • 被引用被引用:1
  • 點閱點閱:272
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  • 下載下載:10
  • 收藏至我的研究室書目清單書目收藏:0
本篇論文利用感應耦合電漿化學氣相沉積(ICPCVD)於低溫時(450oC)製作非晶矽鍺薄膜並且利用可見光雷射(波長532奈米)結晶成多晶矽鍺薄膜,晶粒大小約500奈米至600奈米,我們發現雷射結晶過後的多晶矽鍺薄膜會產生鍺分離的現象,造成表面鍺濃度高於底層。化學機械研磨可以將表面鍺含量高的部分去除並且平坦化表面,利用上述製程技術我們可以製作出平坦且鍺濃度均勻的多晶矽鍺薄膜。
另一方面,由於遠紅外光雷射瞬間的高能量被離子佈值完後形成的缺陷吸收,轉換成晶格震動,可產生等效的熱退火效果以降低片電阻。在我們的研究中,藉由遠紅外光雷射退火可以將參雜後的雷射多晶矽鍺薄膜的片電阻降低為290 Ohm/sq (P型) 和350 Ohm/sq. (N型). 而且參雜的硼不會產生擴散的現象。因此遠紅外光雷射退火適用於奈米級元件製程中。
整合可見光雷射結晶和遠紅外光雷射退火,我們製作出高效能的多晶矽鍺場效電晶體,P型元件中,On電流可以高達51.3 uA/um,次臨界擺幅為240 mV/dec,臨界電壓為-1.05V。N型元件中,On電流可以高達20.1 uA/um,次臨界擺幅為181 mV/dec,臨界電壓為0.95V。此元件製程技術可以應用於奈米級薄膜電晶體或累加型三維電晶體。

In this thesis, the amorphous SiGe thin film is deposited by ICPCVD at low temperature of 450oC, the SiGe thin film is then crystallized by visible laser crystallization (λ=532 nm). The grain size of as-crystallized poly-SiGe thin films range from 500 nm to 600 nm. It is found that germanium segregation is observed after laser crystallization. It causes germanium-rich region on surface of the thin film. Thus, Chemical Mechanical Polishing (CMP) is used to polish high germanium concentration region and smoothen the surface to obtain thin and flat ploy SiGe film with uniform germanium concentration distribution.
Moreover, far infrared ray laser annealing (FIR-LA) can decrease sheet resistance. Laser energy is absorbed in implantation induced defect region and transfer to phonon vibration, which is equal to thermal activation effectively. . In this study, the sheet resistance of polycrystalline SiGe film can be decreased to 290 Ohm/sq. (P-type) and 350 Ohm/sq. (N-type) by far infrared ray laser annealing with less dopants diffusion due to the short time dwell time. Therefore, FIR-LA is also suitable for realizing nano-scaled devices.
The combination of visible laser crystallized SiGe film and far-infrared ray laser activation demonstrated the high performance of poly SiGe metal-oxide-silicon field effect transistor (MOSFET), which exhibited high on current of 51.3 uA/um, low subthreshold swing (S.S.) of 181 mV/dec. and threshold voltage (Vth) of -1.05 V in P-type FET. The N-type device exhibited Ion of 20.1 uA/um, S.S. of 240 mV/dec, and Vth of 0.95 V. The process and related performance is of great potential for nano-scaled TFTs and monolithic 3DICs applications.
Contents
摘要 I
Abstract II
Acknowledgement(Chinese) III
Contents IV
Table Caption VII
Figure Caption VIII
Chapter 1 Introduction 1
1.1 Background 1
1.2 Mechanism of Crystallization 2
1.2.1 Solid-Phase Crystallization (SPC) 2
1.2.2 Metal-Induced Crystallization (MIC) 3
1.3.3 Laser Annealing Crystallization 4
1.3 Mechanism of Activation 5
1.3.1 Rapid Thermal Annealing (RTA) 6
1.3.2 Microwave Annealing 6
1.3.3 Laser Annealing 6
1.4 Poly SiGe FETs 7
1.4.1 SiGe Material Analysis 7
1.4.2 The Application of Poly SiGe FET on LCDs 8
1.4.3 The Application of Poly SiGe TFTs on 3D ICs 8
1.4.4 Poly SiGe TFTs Paper Review 10
Chapter 2 Theory Description 11
2.1 The basic principle of Field Effect Transistor 11
2.2 MOSFET Scaling 13
2.2.1Short-Channel Effects 14
2.2.2 Gate Induce Drain Leakage (GIDL) 16
2.2.3 Fermi Level Pinning 17
2.2.4 Gate Stack and Leakage 18
2.3 Laser Absorption Mechanism 19
Chapter 3 Experimental apparatus and Device fabrication 20
3.1 Manufacturing Instrument Description 20
3.1.1 High-density plasma chemical vapor deposition system (HDPCVD) 20
3.1.2 532 nm Green Laser Annealing System 21
3.1.3 Chemical mechanical polishing 22
3.1.4 Electron-Beam Lithography 23
3.1.5 Dry etching machine - Lam2300 24
3.1.6 Atomic Layer Deposition System (ALD) 25
3.1.7 Multilayer metal sputtering system 27
3.1.8 Ion Implantation 28
3.1.9 Far Infrared Ray Laser Annealing System (FIR- LA) 29
3.2 Material Analysis Instrument Description 30
3.2.1 Raman Spectroscopy 30
3.2.2 Scanning Electron Microscopy (SEM) 31
3.2.3 Atomic Force Microscopy (AFM) 32
3.2.4 X-ray Photoelectron Spectroscopy (XPS) 33
3.2.5 Secondary Ion Mass Spectroscopy Analysis (SIMS) 34
3.3 Fabrication of Poly Silicon Germanium TFTs 36
Chapter 4 Results and Discussion 41
4.1 Poly- SiGe film by laser crystallization 41
4.1.1 Raman Scatter Spectra of Laser Crystalized SiGe film 42
4.1.2 XPS of Laser Crystalized SiGe film 46
4.1.3 Chemical mechanical polishing for Poly-SiGe thin film 47
4.2 Far-Infrared Ray Laser Annealing (FIR-LA) on Polycrystalline SiGe film 50
4.2.1 The Damage of Visible Laser and Far Infrared Laser on Metal Gate 50
4.2.2 Sheet resistance of doped poly Si0.9Ge0.1 film by using FIR-LA and RTA 51
4.2.3 The effect of laser power and scan rate in FIR-LA 53
4.2.4 The effect of Frequency in FIR-LA 54
4.2.5 The diffusion of dopants in LC poly SiGe film 55
4.3 Low Thermal Budget Nano-scaled Poly Si0.9Ge0.1 FET 56
4.3.1 Id-Vg curve of LC poly SiGe FET 57
4.3.2 Id-Vg curve, channel resistance and contact resistance of LC poly SiGe FET 59
4.3.3 The Comparison of LC poly SiGe FET by using FIR-LA and by using RTA 62
4.3.4 The Comparison of LC poly Si0.9Ge0.1 FET and LC poly Si FET 63
Chapter 5 Conclusion and Future work 65
5.1 Conclusion 65
5.2 Future work 66
5.2.1 High Germanium Centration poly SiGe FET 66
5.2.2 FIR-LA by Homogenizer 66
Reference 68

[1] H. Watakabe and T. Sameshima, JOURNAL OF APPLIED PHYSICS VOLUME 95, NUMBER 11(2004) [2]
[2] Lucia M. Feng, Yun Wang, David A. Markle, Junction Technology, 2006. IWJT '06. International Workshop on
[3] C.C. Tsai , K.F. Wei et. al , High-Performance Short-Channel Double-Gate Low-Temperature Polysilicon Thin-Film Transistors Using Excimer Laser Crystallization , IEEE ELECTRON DEVICE LETTERS, VOL. 28, NO. 11, NOVEMBER 2007
[4] S.Y. Zhao , Z.G. Meng et. al , Bridged-Grain Polycrystalline Silicon Thin-Film Transistors , IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 60, NO. 6, JUNE 2013
[5] D. Murley , N. Young et. al , An Investigation of Laser Annealed and Metal-Induced Crystallized Polycrystalline Silicon Thin-Film Transistors , IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 48, NO. 6, JUNE 2001
[6] Y. Sugawara , Y. Uraoka et. al , Crystallization of Double-Layered Silicon Thin Films by Solid Green Laser Annealing for High-Performance Thin-Film Transistors , IEEE ELECTRON DEVICE LETTERS, VOL. 28, NO. 5, MAY 2007
[7] Y. Sugawara , Y. Uraokaet. al, Crystallization of Double-Layered Silicon Thin Films by Solid Green Laser Annealing for High-Performance Thin-Film Transistors , IEEE ELECTRON DEVICE LETTERS, VOL. 28, NO. 5, MAY 2007
[8] C.H. Poon, a L.S. Tan , Boron Profile Narrowing in Laser-Processed Silicon after Rapid Thermal Anneal , Journal of The Electrochemical Society, 151 ~1G80-G83 ~2004
[9] Y.L. Lu , Y.J. Lee et. al , Simultaneous Activation and Crystallization by Low-Temperature Microwave Annealing for Improved Quality of Amorphous Silicon Thin-Film Transistors , ECS Solid State Letters, 1 (1) P1-P3 (2012)
[10] T.Y. Koh , T.P. Lee et. al , Pulsed Laser Annealing of Silicon-Carbon Source/Drain in MuGFETs for Enhanced Dopant Activation and High Substitutional Carbon Concentration , IEEE ELECTRON DEVICE LETTERS, VOL. 29, NO. 5, MAY 2008
[11] Raminderpal Singh; Modest M. Oprysko; David Harame (2004). Silicon Germanium: Technology, Modeling, and Design.
[12] M.H. Juang, et al, Formation of polycrystalline thin-film transistors with stacked poly-SiGe/poly-Si channel layer for low-voltage applications, Thin Solid Films 519 (2011) 3393–3396
[13] M.H. Juang, et al, Formation of sub-micrometer polycrystalline-SiGe thin-film transistors by using a thinned channel layer. Solid-State Electronics 54 (2010) 03–306
[14] 蕭宏, 半導體製程技術導論:學銘圖書有限公司, 2007.
[15] Jung-Hau Shiu, Vth tunable embedded source/drain epi-like Si FETs for 3D sequential integration, Institute of Photonics Technologies College of Electrical Engineering and Computer Science National Tsing Hau University
[16] Fabio D’Agostino Daniele Quercia, Short-Channel Effects in MOSFETs, Introduction to VLSI design (EECS 467)
[17] Li-Wei Chen, Analysis and Simulation of Two-Dimensional Double-Gate MOSFET, National Central University, June 2012
[18] Farkhanda Ana and Najeeb-ud-din,SUPPRESSION OF GATE INDUCED DRAIN LEAKAGE CURRENT (GIDL) BY GATE WORKFUNCTION ENGINEERING: ANALYSIS AND MODELNational Institute of Technology Hazratbal Srinagar 190 006 India Journal of Electron Devices, Vol. 13, 2012, pp.984 996
[19] Che-Ju Shih, A Study on the Nickel Germanide Contacted N+-P Germanium Shallow Junction and Contact Resistance, A thesis Submitted to Department of Electronics Engineering and Institute of Electronics College of Electrical and Computer Engineering National Chiao Tung University
[20] Lucia M. Feng, Yun Wang, David A. Markle, Minimizing Pattern Dependency in Millisecond Annealing, Junction Technology 2006 IWJT '06 International Workshop on
[21] W. C. Nixon, Phil. Trans. Ray. Soc. Lond. B. 261, 45 (1971).
[22] Badih El-Kareh,Fundamentals of Semiconductor Processing Technology
[23] W. C. Nixon, Phil. Trans. Ray. Soc. Lond. B. 261, 45 (1971).
[24] Balaji Rangarajan, et al, ECS Journal of Solid State Science and Technology, 1 (6) P263-P268 (2012)
[25] S.Chiussi, et al, Applied Surface Science 208-209 (2003)
[26] Jung-Hau Shiu, V_th tunable embedded source/drain epi-like Si FETs for 3D sequential integration, 2014
[27] Uio-Pu Chiou, et al, Double-metal-gate nanocrystalline Si thin film transistors with flexible, Appl. Phys. Lett. 103, 203501 (2013); doi: 10.1063/1.4832072
threshold voltage controllability
[28] A. Florakis, et al, Thin Solid Films 518 (2010) 2551–2554
[29] M. Zakir Hossain1 and Quazi D. M. Khosru2, Threshold Voltage Roll-Off Due to Channel Length Reduction for a Nanoscale n-channel FinFET, International Journal of Emerging Technologies in Computational and Applied Sciences (IJETCAS)
[30] M.H. Juang, et al, Formation of sub-micrometer polycrystalline-SiGe thin-film transistors by using a thinned channel layer. Solid-State Electronics 54 (2010) 03–306

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